Device Family Support
- Spartan-3A
- Spartan-3A DSP
- Spartan-3AN
- Spartan-II
- Spartan-IIE
- Virtex-4
- Virtex-5 FXT
- Virtex-5 LX
- Virtex-5 LXT
- Virtex-5 SXT
- Virtex-E
- Virtex-II
- Spartan-3
- Virtex-II Pro
CoreConnect™ is an IBM-developed on-chip bus-communications link that enables chip cores from multiple sources to be interconnected to create entire new chips. CoreConnect technology eases the integration and reuse of processor, system and peripheral cores within standard product platform designs to achieve overall greater system performance. The CoreConnect bus architecture includes the Processor Local Bus (PLBv46 and PLBv34), the On-chip Peripheral Bus (OPB), a bus bridge, two arbiters, and a Device Control Register (DCR) bus.
Xilinx offers the IBM CoreConnect license to all its embedded processor customers since CoreConnect technology serves as the infrastructure for all Xilinx embedded processor designs.
The MicroBlaze™ processor uses the same bus for peripherals as the IBM PowerPC® processor. While the MicroBlaze soft processor does not have any dependency on the PowerPC processor, the designer may use devices that contain an embedded PowerPC processor and share its peripherals. After registering for IBM CoreConnect technology and signing the web-based license agreement, you may access IBM CoreConnect technology.
Key Features
- Same interconnect bus supports the hard embedded PowerPC core in Virtex™-5, Virtex-4, and Virtex-II Pro also supports the MicroBlaze 32-bit soft processor core in the other Spartan™ and Virtex series FPGAs
- Included the high-speed Processor Local Bus and the lower bandwidth On chip Peripheral Bus
- Comprehensive set of peripherals that can be attached to the bus to be used with either processor core
