XPS Ethernet Lite

Documentation

• XPS Ethernet Lite

Device Family Support

• Spartan-3A
• Spartan-3AN
• Spartan-3E
• Virtex-4 FX
• Virtex-4 LX
• Virtex-4 SX
• Virtex-5 LX
• Virtex-5 LXT
• Virtex-5 SXT
• Spartan-3

Requirements

EDK 9.2I SP2 or higher and ISE 9.2I SP1 or higher

The Ethernet Lite MAC (Media Access Controller) is designed to incorporate the applicable features described in the IEEE Std. 802.3 Media Independent Interface (MII) specification, which should be used as the definitive specification.

The Ethernet Lite MAC supports the IEEE Std. 802.3 Media Independent Interface (MII) to industry standard Physical Layer (PHY) devices and communicates to a processor via a Processor Local Bus (PLB) interface. The design provides a 10 Megabits per second (Mbps) and 100 Mbps (also known as Fast Ethernet) Interface. The goal is to provide the minimal functions necessary to provide an Ethernet interface with the least resources used.

Key Features

• PLB interface is based on PLB v4.6 specification
• Memory mapped direct I/O interface to the transmit and receive data dual port memory
• Media Independent Interface (MII) for connection to external 10/100 Mbps PHY transceivers
• Independent internal 2K byte Tx and Rx dual port memory for holding data for one packet
• Optional dual buffer memories, 4K byte ping-pong, for Tx and Rx