Clock Divider

Clock Divider

Clock Divider improves power savings by providing clock division at standard values. CoolRunner-II CPLDs give the designer unsurpassed clock management features that enable an easy to implement total clock management solution.

Gives solid clock division without using macrocells
Duty cycle improvement
Available in large densities (128 macrocells and above)
Very low lag ...typically 50 ps!

coolrunner-ii-clock-divide

Figure 1: Clock Divider provides clock division at standard values (2 though 16)