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XA 9500XL CPLD Family

XA9500XL Product Table

The XA9500XL 3.3V family of CPLDs provide a high-performance, nonvolatile programmable logic solution comprising cost-optimized silicon, free design tools , and unparalleled support. Using the same design environment as Xilinx FPGAs, XA9500XL CPLDs provide everything you need for flexible, advanced logic system design.

XA 9500XL CPLD Family Benefits

Maximum design flexibility
  • 5.0V, 3.3V and 2.5V I/O interfacing
  • 36 to 288 macrocell densities available with multiple package options and I/O capacity for easy migration across multiple densities
  • Advanced, second-generation pin locking for easy redesign without changing board layout
  • In-system programming (ISP) and full IEEE 1149.1 JTAG boundary scan
  • Extended temperature ranges available for automotive applications
  • Fast in-system programming and erase times
  • Re-configurable throughout the full commercial operating range and a high programming endurance rating for worry-free system updates in the field
Lowest overall system cost
  • Low unit costs
  • Small form factor packaging
Lowest barriers to design entry

XA 9500XL CPLD Features

Features XA 9500XL
5V tolerant I/O pins 5V, 3.3V, 2.5V
Output capability 3.3V, 2.5V
Pin-compatible device densities 4
In-system programmability
Pin-locking and routability
Fast concurrent programming
Enhanced data security

Applications and Technologies

Possible applications include:

Key Documents

Name Modified Size
XA9500XL CPLD Automotive XA Family  01/12/2007   146 KB 
Automotive Brochure      
 
 
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