Thanks to the recent 30 percent power reduction, 40 percent performance, and a 2.5x runtime improvement in Spartan-6 using ISE 12.4, ZTE is on track to be first-to-market with innovative new data communications equipment in 2011designed with Spartan-6 FPGAs.
- Li Jianyu, Chief Logic Design Engineer, ZTE
| System Requirements | LX | LXT |
|---|---|---|
| Integrated hard memory | ![]() |
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| Block RAM | ![]() |
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| Higher performance clocking | ![]() |
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| High-performance serial I/O | ![]() |
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| Streamlined configuration | ![]() |
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| Embedded hard IP | ![]() |
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| Unparalleled DSP performance | ![]() |
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| Integrated transceivers | ![]() |
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| Integrated PCI Express Endpoint block | ![]() |
| Name | Modified | Size |
|---|---|---|
| Spartan-6 Family Overview | 10/25/2011 | 308 KB |
| Spartan-6 FPGA Data Sheet: DC and Switching Characteristics | 10/17/2011 | 1.86 MB |
| WP310 - Addressing the Performance Bottleneck in Modern SoC Design – Serial I/O Connectivity | 09/15/2009 | 1.75 MB |
| WP368 - Unlock New Levels of Productivity for Your Design Using ISE Design Suite 12 | 05/03/2010 | 509 KB |
| WP370 - Reducing Switching Power with Intelligent Clock Gating | 03/01/2011 | 395 KB |
| WP396 - High-Volume Spartan-6 FPGAs: Performance and Power Leadership by Design | 05/19/2011 | 722 KB |
| Spartan-6 FPGA Product Brief |