Defense-grade Virtex-5Q LX FPGAs
The Defense-grade Virtex®-5Q family offers the largest selection of reprogrammable devices for mission critical Aerospace & Defense applications.
Virtex-5Q LX Benefits
- Up to 330,000 Logic Cells
- 500 MHz clocking with clock management tile
- Up to 6.5Gbps high-performance RocketIO GTX transceivers
- 528 GMACs from 500 MHz DSP48E slices with 25x18 multipliers for DSP acceleration
- 192 GFLOPS single-precision and 68 GFLOPS double-precision floating point DSP
- Ruggedized packaging for protection against ‘tin-whiskering’ and caustic solvent cleaning systems
- Bare Die available for extreme form factor requirements
- Long term support based on 20 years service to the A&D Industry
Virtex-5Q Features
| Features | LX | LXT | SXT | FXT |
|---|---|---|---|---|
| ExpressFabric architecture with 6-input LUTs | ||||
| 500 MHz Clock Management Tiles (2DCM + 1PLL) | 2-6 | 1-6 | 2-6 | 2-6 |
| 500 MHz block RAM | 1,152-10,368 | 936-11,664 | 3,024-18,576 | 2,448-16,416 |
| 1.25 Gbps SelectIO technology | ||||
| RocketIO GTP transceivers | - | 4-24 | 8-24 | - |
| RocketIO GTX transceivers | - | - | - | 8-24 |
| PCI Express® endpoint blocks | - | 1 | 1 | 1-4 |
| Ethernet Media Access Controllers | - | 2-4 | 4 | 4-8 |
| 500 MHz DSP48E slices | 32-192 | 24-192 | 192-1,056 | 64-320 |
| PowerPC® 440 processor blocks | - | - | - | 1-2 |
| System monitor and analog-to-digital converter | ||||
| Sparse chevron packaging technology | ||||
| Enhanced configuration and bitstream protection |
Key Documents
| Name | File Size | Modified Date |
|---|---|---|
| Virtex-5Q FPGA Data Sheet: DC and Switching Characteristics | 2.62 MB | 01/17/2011 |
| Virtex-5 FPGA Packaging and Pinout Specification | 9.78 MB | 06/14/2012 |
| Virtex-5Q Family Overview | 405 KB | 03/22/2010 |
| Defense Grade Virtex-5Q FPGA Product Brief |