Virtex-6 FPGA Family
Webcasts
The Virtex®-6 FPGA family is the high-performance silicon foundation for Targeted Design Platforms. Consuming 50% lower power and delivering 20% lower cost than the previous generation, the new family is built with the right mix of programmability, integrated blocks for DSP, memory, and connectivity support - including high-speed transceiver capabilities - to satisfy the insatiable demand for higher bandwidth and higher performance.
Virtex-6 FPGA Family Benefits
Meet your performance targets easily
- Achieve a one speed-grade performance gain with second-generation ExpressFabric™ technology, 600MHz clocking technology and performance-tuned IP blocks
- Build high-bandwidth interfaces for DDR3 memory with flexible SelectIO™ technology
- Accelerate DSP performance with DSP48E1 slices
Stay within your power budget without sacrificing performance
- Advanced 40nm process, architecture, tools, and system level optimizations reduce core power by 30%
- Low-voltage option increases power savings by 50% without significant performance penalties
- Enhanced SelectIO technology reduces I/O power by up to 50%
Optimize I/O bandwidth, power and cost with easy-to-use high-speed connectivity technologies
- Choose between two varieties of low-power serial transceivers offering bandwidth in excess of 11Gbps
- Obtain assured compliance with popular standards such as 10/40/100G Ethernet, SFP+, OTU-1/2/4, PCI Express®, OC-48, XAUI, SRIO, and HD-SDI
- Implement widely-used interfaces with second-generation integrated PCI Express blocks and third-generation Tri-mode Ethernet MAC blocks
- Integrate multiple functions into a single PCIe®-enabled (Gen1 and Gen2) FPGA supporting x1, x2, x4, and x8
Platforms and Solutions
Virtex-6 FPGA Comparison Table
| System Requirements | LXT | SXT | HXT |
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| High-performance Logic |  |
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| High-density ASIC prototyping logic | |
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| General purpose processing | |
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| Digital signal processing | |
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| Ultra-high performance digital signal processing | |
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| Low-power serial I/O | |
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| Serial I/O bandwidth | |
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Key Documents
| Name | Modified | Size |
|---|---|---|
| Virtex-6 Family Overview | 01/19/2012 | 383 KB |
| WP310 - Addressing the Performance Bottleneck in Modern SoC Design – Serial I/O Connectivity | 09/15/2009 | 1.75 MB |
| WP298 - Power Consumption at 40 and 45 nm | 04/13/2009 | 1.59 MB |
| WP368 - Unlock New Levels of Productivity for Your Design Using ISE Design Suite 12 | 05/03/2010 | 509 KB |
| WP370 - Reducing Switching Power with Intelligent Clock Gating | 03/01/2011 | 395 KB |
| Virtex-6 Product Brief |