Performance

Beats Competing FPGAs in Every Performance Category
High-performance system design is a balancing act involving trade-offs in power consumption, signal integrity, and cost. Xilinx developed the Virtex™-4 family, the world's fastest FPGAs, in consultation with hundreds of customers worldwide to make it easier than ever to meet your performance goals

Virtex-4 FPGAs Beat the Competition in Every Performance Category

Table 1: Performance diagram data
Capability	Virtex-4 FPGAs	Altera Stratix II FPGAs	Virtex-4 Advantage
I/O LVDS Bandwidth	480 Gbps	312 Gbps	1.6x
Memory Interfaces: widest data bus	260 Gbps	86.4 Gbps	3.0x
Serial I/O	6.5 Gbps	6.375 Gbps	1.02x
On-chip RAM	500 MHz	420 MHz	1.2x
DSP Performance: 32-tap Filter	500 MHz	348 MHz	1.4x
Embedded Processing (per processor core)	702 DMIPS	225 DMIPS	3.1x
Fabric Performance (normalized average)	1.0	0.87	1.15x
Note: Virtex-4 performance figures generated with ISE™ 7.1, Synplify 8.0 Stratix II performance figures generated with Quartus 4.2, SP1

Breakthrough Performance

Virtex-4 FPGAs help you achieve your performance targets in the shortest possible time by offering the most advanced:

• Programmable fabric
• I/O blocks
• Hard IP blocks
• Technologies for improving effective performance
• Advanced development tools and IP

Fabric Performance

Xilinx enhanced the performance of the world's fastest programmable fabric by building Virtex-4 devices with advanced 90 nm technology. New high-speed carry logic provides further performance gains. Evaluations of logic fabric performance using a suite of real-world designs demonstrate a performance advantage of 15% on average, and up to 70% above our nearest 90 nm competitor. On average, Virtex-4 devices provide effectively an extra speed grade advantage for free.

IO Bandwidth

Getting your FPGA to run fast is only half the battle. Maximum system performance requires efficient interaction between the FPGA and the other components in your system. Virtex-4 FPGAs offer the flexibility to achieve the highest possible bandwidth for chip-to-chip, board-to-board, and box-to-box connectivity.

Serial I/O

For serial communications, RocketIO™ multi-gigabit transceivers offer performance from 622 Mbps to 6.5 Gbps, the broadest range offered by any device.

Memory Interfaces

ChipSync™ circuitry built into every SelectIO™ block simplifies implementation of high-speed source-synchronous interfaces. Xilinx provides hardware-verified reference designs, development systems, and software tools to speed implementation of memory interfaces.

On-chip Memory

Block RAM is tuned to run at speeds up to 500 MHz and built-in circuitry enables you to configure these memories as 500 MHz FIFOs without consuming logic fabric resources.

DSP Performance

Configure XtremeDSP™ blocks to implement multipliers, counters, multiply-accumulators, and many more functions, all without consuming logic fabric resources. With 512 XtremeDSP slices running at 500 MHz, the XC4VSX55 device delivers an amazing 256 GigaMAC/second (GMACS) performance!

Embedded Processing

Only Xilinx offers FPGAs with built-in processor cores. The Virtex-4 enhanced PowerPC® 405 core delivers 680 DMIPS performance at 450 MHz and the new Auxiliary Processor Unit (APU) controller makes it easy to reach new levels of performance by integrating custom co-processors and hardware accelerators.

Technologies for Improving Effective Performance

Extracting maximum performance from on-chip resources requires clock and data signal integrity. Virtex-4 FPGAs incorporate a low-skew, low-jitter 500 MHz differential clock structure with greatly expanded flexibility. Advanced packaging technology and flip-chip assembly techniques, enabled by the proprietary ASMBL technology and abundant PWR/GND pins, improves signal integrity by minimizing package and PCB inductance. XCITE on-chip signal termination technology provides digitally-controlled impedance for optimum tuning of component interconnect while minimizing system component count and cost.

Lower power consumption per MHz means you can achieve more performance within your power budget. Virtex-4 FPGAs reduce dynamic power consumption with 90 nm technology while reducing static power consumption with triple-oxide technology. The net result is a 50% reduction in power consumption compared to previous generation FPGAs and a significant advantage over the nearest 90 nm competitor.

Give Your Designs the Virtex-4 Performance Advantage

Xilinx offers the following tool to help system designers achieve system performance goals quickly and easily.

• PlanAhead software works with Xilinx ISE design tools to deliver a two speed-grade performance advantage for Virtex-4 FPGAs, compared to competing solutions, with support for hierarchical floorplanning, early design analysis, DRC, physical design, and detailed performance analysis.

Proper HDL coding is essential for extracting maximum performance from Virtex-4 FPGAs