Secure Chip AES

Secure Chip AES bitstream encryption/decryption technology

Protect your intellectual property with security you can bank on. Virtex™-4 FPGAs protect your design with AES (Advanced Encryption Standard) technology-the same technology used by financial institutions worldwide.

Features at a Glance

• Software-based bitstream encryption and on-chip bitstream decryption logic with dedicated memory for storing the 256-bit encryption key.
• You generate the encryption key and encrypted bitstream using Xilinx ISE™ software. During configuration, the Virtex-4 device decrypts the incoming bitstream.

Battery-backed key provides unbreakable security

The Xilinx approach to security makes it virtually impossible for thieves to steal your design data. Virtex-4 FPGAs store the encryption key internally in dedicated RAM, backed up by a small externally connected battery (typical life 20+ years). It is not possible to read the encryption key out of the device. In contrast to protection schemes that use non-volatile key storage, any attempt to remove the Virtex-4 FPGA from the board in order to decapsulate the package for probing results in the instant loss of your encryption key and programming data.

Designing with Secure Chip AES

• Encrypt your design data with the iMPACT configuration tools included in ISE software