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Virtex-4
Product Tables
For more details, select a link below:
Virtex-4 LX FPGA Device/Package Combinations
| Feature/Product |
XC
4VLX15 |
XC
4VLX25 |
XC
4VLX40 |
XC
4VLX60 |
XC
4VLX80 |
XC
4VLX100 |
XC
4VLX160 |
XC
4VLX200 |
| EasyPath™ Cost Reduction Solutions |
-- |
XCE
4VLX25 |
XCE
4VLX40 |
XCE
4VLX60 |
XCE
4VL80 |
XCE
4VLX100 |
XCE
4VLX160 |
XCE
4LX200 |
| Logic Cells |
13,824 |
24,192 |
41,472 |
59,904 |
80,640 |
110,592 |
152,064 |
200,448 |
| Block RAM/FIFO w/ECC (18 kbits each) |
48 |
72 |
96 |
160 |
200 |
240 |
288 |
336 |
| Total Block RAM (kbits) |
864 |
1,296 |
1,728 |
2,880 |
3,600 |
4,320 |
5,184 |
6,048 |
| Digital Clock Managers (DCM) |
4 |
8 |
8 |
8 |
12 |
12 |
12 |
12 |
| Phase-matched Clock Dividers (PMCD) |
0 |
4 |
4 |
4 |
8 |
8 |
8 |
8 |
| Max Differential I/O Pairs |
160 |
224 |
320 |
320 |
384 |
480 |
480 |
480 |
| XtremeDSP™ Slices |
32 |
48 |
64 |
64 |
80 |
96 |
96 |
96 |
| PowerPC™ Processor Blocks |
-- |
-- |
-- |
-- |
-- |
-- |
-- |
-- |
| 10/100/1000 Ethernet MAC Blocks |
-- |
-- |
-- |
-- |
--- |
-- |
-- |
-- |
| RocketIO™ Serial Transceivers |
-- |
-- |
-- |
-- |
-- |
-- |
-- |
-- |
| Configuration Memory Bits |
4,764,456 |
7,819,904 |
12,259,712 |
17,717,632 |
23,291,008 |
30,711,680 |
40,347,008 |
51,367,808 |
| Max SelectIO™ |
320 |
448 |
640 |
640 |
768 |
960 |
960 |
960 |
| Package* |
User
I/O |
User
I/O |
User
I/O |
User
I/O |
User
I/O |
User
I/O |
User
I/O |
User
I/O |
| SF363 |
240 |
240 |
- |
- |
- |
- |
- |
- |
| FF668 |
320 |
448 |
448 |
448 |
- |
- |
- |
- |
| FF1148 |
- |
- |
640 |
640 |
768 |
768 |
768 |
- |
| FF1513 |
- |
- |
- |
- |
- |
960 |
960 |
960 |
Return to Top |
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Virtex-4 SX FPGA Device/Package Combinations
| Feature/Product |
XC
4VSX25 |
XC
4VSX35 |
XC
4VSX55 |
| EasyPath Cost Reduction Solutions |
XCE
4VSX25 |
XCE
4VSX35 |
XCE
4VSX55 |
| Logic Cells |
23,040 |
34,560 |
55,296 |
| Block RAM/FIFO w/ECC (18 kbits each) |
128 |
192 |
320 |
| Total Block RAM (kbits) |
2,304 |
3,456 |
5,760 |
| Digital Clock Managers (DCM) |
4 |
8 |
8 |
| Phase-matched Clock Dividers (PMCD) |
0 |
4 |
4 |
| Max Differential I/O Pairs |
160 |
224 |
320 |
| XtremeDSP™ Slices |
128 |
192 |
512 |
| PowerPC Processor Blocks |
-- |
-- |
-- |
| 10/100/1000 Ethernet MAC Blocks |
-- |
-- |
-- |
| RocketIO Serial Transceivers |
-- |
-- |
-- |
| Configuration Memory Bits |
9,147,648 |
13,700,288 |
22,745,216 |
| Max SelectIO |
320 |
448 |
640 |
| Package* |
User
I/O |
User
I/O |
User
I/O |
| SF363 |
- |
- |
- |
| FF668 |
320 |
448 |
- |
| FF1148 |
- |
- |
640 |
| FF1513 |
- |
- |
- |
Return to Top |
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Virtex-4 FX FPGA Device/Package Combinations
| Feature/Product |
XC
4VFX12 |
XC
4VFX20 |
XC
4VFX40 |
XC
4VFX60 |
XC
4VFX100 |
XC
4VFX140 |
| EasyPath Cost Reduction Solutions |
-- |
XCE
4VFX20 |
XCE
4VFX40 |
XCE
4VFX60 |
XCE
4VFX100 |
XCE
4VFX140 |
| Logic Cells |
12,312 |
19,224 |
41,904 |
56,880 |
94,896 |
142,128 |
| Block RAM/FIFO w/ECC (18 kbits each) |
36 |
68 |
144 |
232 |
376 |
552 |
| Total Block RAM (kbits) |
648 |
1224 |
2,592 |
4,176 |
6,768 |
9,936 |
| Digital Clock Managers (DCM) |
4 |
4 |
8 |
12 |
12 |
20 |
| Phase-matched Clock Dividers (PMCD) |
0 |
0 |
4 |
8 |
8 |
8 |
| Max Differential I/O Pairs |
160 |
160 |
224 |
288 |
384 |
448 |
| XtremeDSP™ Slices |
32 |
32 |
48 |
128 |
160 |
192 |
| PowerPC Processor Blocks |
1 |
1 |
2 |
2 |
2 |
2 |
| 10/100/1000 Ethernet MAC Blocks |
2 |
2 |
4 |
4 |
4 |
4 |
| RocketIO Serial Transceivers |
0 |
8 |
12 |
16 |
20 |
24 |
| Configuration Memory Bits |
4,765,568 |
7,242,624 |
13,550,720 |
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