Virtex™-5 FPGAs offer up to 11.6 Mbits of flexible embedded Block RAM to efficiently store and buffer data without off-chip memory. Each memory block stores up to 36 Kbits of data and can be configured as either two independent 18 Kb Block RAM, or 36 Kb Block RAM. Block RAM can be configured as dual-port RAM or as FIFO and offers 64-bit error checking and correct (ECC) to improve system reliability.
Table 1: Virtex-5 FPGA Block RAM Feature Benefits
Feature
Benefit
550 MHz performance
Achieve high data rates
36 Kbit block size
Implement larger customized memory arrays by cascading BRAMs:
True Dual-Port widths up to x36
Simple Dual-Port widths up to x72
Examples:
Cascade two Block RAM to build 64 Kbit x 1 array
Build a 512 Kb RAM using only 16 Block RAM
Built in FIFO Logic
Create synchronous or multi-rate FIFOs without consuming logic resources
Built-in dual-port support
Achieve double bandwidth by building simple dual-port memories with 18 Kb Block RAM or 36 Kb Block RAM
Cascadable
Cascade two 36 Kbit Block RAM to build a 64 Kbit x 1 array without consuming any FPGA local interconnect or additional CLB resources
Enhanced power management
Turn off unused 18 Kb Block RAM
Optional output registers
Eliminate routing delay to CLB flip-flops for pipelined operation
Table 2: Advantages Over Virtex-4 Devices
Feature
Virtex-5
Virtex-4
Individual Block RAM Size
36 Kbits, configurable as one 36 Kbits Block RAM or two independent 18 Kbits Block RAM
