Memory Solutions
Xilinx memory interface solutions are based on hardware-verified reference designs and software tools that enable you to quickly generate your own custom design.
View Video: Memory Interface Design for 7 series FPGAs with MIG (13.2 release).
Simplify memory device selection and controller implementation with the following application notes, reference designs and the Memory Interface Generator (MIG).
Memory Interface Support for FPGAs
| Memory Type | 7 Series | Virtex-6 | Spartan-6 | Virtex-5 | Virtex-4 | Extended Spartan-3A |
|---|---|---|---|---|---|---|
| DDR3 SDRAM | 1866 Mbps# | 1066 Mbps | 800 Mbps | 800 Mbps** | - | - |
| 933 MHz | 533 MHz | 400 MHz | 400 MHz | |||
| DDR2 SDRAM | 800 Mbps# | 800 Mbps | 800 Mbps | 667 Mbps | 600 Mbps | 400 Mbps* |
| 400 MHz | 400 MHz | 400 MHz | 333 MHz | 300 MHz | 200 MHz | |
| DDR SDRAM | - | - | 400 Mbps | 400 Mbps | 344 Mbps | 333 Mbps |
| 200 MHz | 200 MHz | 172 MHz | 166 MHz | |||
| LPDDR SDRAM | - | - | 400 Mbps | - | - | - |
| 200 MHz | ||||||
| LPDDR2 SDRAM | 800 Mbps# | - | - | - | - | - |
| 400 MHz | ||||||
| QDR II/QDRII+ SRAM | 2 x 1100 Mbps# | 2 x 800 Mbps | - | 2 x 600 Mbps | 2 x 550 Mbps | - |
| 550 MHz | 400 MHz | 300 MHz | 275 MHz | |||
| RLDRAM II | 1066 Mbps# | 1000 Mbps | - | 667Mbps | 470 Mbps | - |
| 533 MHz | 500 MHz | 333 MHz | 235 MHz | |||
| RLDRAM 3 | 1600 Mbps# | - | - | - | - | - |
| 800MHz |
Notes:
*Spartan®-3A/AN devices support 400Mbps DDR2 interfaces (see Application Note: XAPP458).
**Virtex®-5 800 Mbps DDR3 subject to characterization.
# 7 series devices subject to characterization.
Memory Interface Generator (MIG)
Generate your Virtex-6, Spartan-6, Virtex-5, Virtex-4, and Extended Spartan-3A FPGAs memory interface reference designs, including HDL code and pin placements, using this user-friendly tool.
First time users | Registered users
Registered users may download the User Guide and the MIG tool. The User Guide contains information such as recommended pin constraints, PCB trace matching, termination schemes, clock-capable IO rules, bank recommendations, DCI, and ODT suggestions.
Additional Memory Resources by FPGA
7 Series FPGAs
- 7 Series FPGAs Memory Interface Solutions Data Sheet (PDF)
- 7 Series FPGAs Memory Interface Solutions User Guide (PDF)
- Achieving High Performance DDR3 Data Rates in Virtex-7 and Kintex™-7 FPGAs
Virtex-6 FPGAs
- Virtex-6 FPGA Memory Interface Solutions Data Sheet (PDF)
- Virtex-6 FPGA Memory Interface Solutions User Guide (PDF)
Spartan-6 FPGAs
Virtex-5 FPGAs
- Memory Interfaces with Xilinx FPGAs White Paper (PDF)
- Virtex-5 LXT ML561 Advanced Memory Interfaces Tool Kit
- DDR2 Controller Interface for Virtex-5 FPGA Characterization Report
Extended Spartan-3A FPGAs
DDR2 reference design and DDR2-400 video demo for the Spartan-3A Starter Kit board. Registered users may download complete files.
First time users | Registered users
DDR reference design for the Spartan-3E Starter Kit. Registered users may download complete files.
First time users | Registered users