^

UltraScale Architecture

bnr-ultrascale

The Industry’s First ASIC-Class Architecture

Xilinx UltraScale™ architecture applies leading-edge ASIC techniques in a fully programmable architecture to enable multi-hundred gigabit-per-second levels of system performance with smart processing at full line rates, scaling to terabits and teraflops. Based on this ASIC-class architecture, Kintex® UltraScale and Virtex® UltraScale devices extend the company’s market leading FPGA and 3D IC families and enable next generation smarter systems with new high-performance architectural requirements. The UltraScale portfolio scales from 20nm planar through 16nm FinFET technologies and beyond, while also scaling from monolithic through 3D ICs.

Our Next Architecture for Your Next Architecture


Core technologies of the UltraScale architecture include next generation routing, ASIC-like clocking, and logic infrastructure enhancements to eliminate the number one bottleneck at advanced nodes – the interconnect -- to improve performance and device utilization while accelerating design closure. Based on the ASIC-class advantage of the UltraScale architecture, the UltraScale families are co-optimized with the Vivado® Design Suite and leverage the UltraFAST™ design methodology to accelerate time to market.

Additional block-level innovations optimize critical paths for massive data flow and reduce power consumption at every level::

  • High-speed memory cascading to remove bottlenecks in DSP and packet processing
  • Enhanced DSP slices incorporating 27x18-bit multipliers and dual adders that enable a massive jump in fixed- and IEEE Std 754 floating-point arithmetic performance and efficiency
  • Step function in inter-die bandwidth for 2nd generation 3D IC systems integration and new 3D IC wide memory optimized interface
  • Massive I/O and memory bandwidth, including support for next-generation memory interfacing with dramatic latency reduction and multiple hardened, ASIC-class 100G Ethernet, Interlaken, and PCIe® IP cores
  • Power management with a significant scope of static- and dynamic-power gating across a wide range of functional elements yielding significant power savings
  • Next generation security with advanced approaches to AES bitstream decryption and authentication, key-obfuscation, and secure device programming
UltraScale FPGA Families

The initial UltraScale devices extend the company’s mid-range and high-end FPGA and 3D IC leadership, and will serve as the foundation for future Zynq® UltraScale All Programmable SoCs. They will enable next generation smarter systems with new high-performance architectural requirements, including:

  • 400G OTN with intelligent packet processing and traffic management
  • 4X4 Mixed Mode LTE and WCDMA Radio with smart beamforming
  • 4K2K and 8K displays with smart image enhancement and recognition
  • Highest performance systems for intelligence surveillance and reconnaissance (ISR)
  • High performance computing applications for the data center

UltraScale Blog