Xilinx UltraScale™ architecture applies leading-edge ASIC techniques in a fully programmable architecture to enable multi-hundred gigabit-per-second levels of system performance with smart processing at full line rates, scaling to terabits and teraflops. Based on this ASIC-class architecture, Kintex® UltraScale and Virtex® UltraScale devices extend the company’s market leading FPGA and 3D IC families and enable next generation smarter systems with new high-performance architectural requirements. The UltraScale portfolio scales from 20nm planar through 16nm FinFET technologies and beyond, while also scaling from monolithic through 3D ICs.
Core technologies of the UltraScale architecture include next generation routing, ASIC-like clocking, and logic infrastructure enhancements to eliminate the number one bottleneck at advanced nodes – the interconnect -- to improve performance and device utilization while accelerating design closure. Based on the ASIC-class advantage of the UltraScale architecture, the UltraScale families are co-optimized with the Vivado® Design Suite and leverage the UltraFAST™ design methodology to accelerate time to market.
Additional block-level innovations optimize critical paths for massive data flow and reduce power consumption at every level::
The initial UltraScale devices extend the company’s mid-range and high-end FPGA and 3D IC leadership, and will serve as the foundation for future Zynq® UltraScale All Programmable SoCs. They will enable next generation smarter systems with new high-performance architectural requirements, including: