Dual power management modes for instant power savings and eliminates the need for extra components.

The integrated power management (PDF) reduces power consumption by up to 99%. A single pin activated, hardware feature is built-in unlike other external implementations which requires additional components.

Suspend mode

• Over 40% static power reduction
• All states saved in memory
• Scale down voltage (VCCAUX) and shut off non-essential functions (e.g., FPGA inputs, interconnects)
• System synchronization for fast wake-up

Hibernate mode

• Up to 99% static power reduction
• Shut off all power
• Wake up time
• Ultimate battery life extension

Figure 1

Dual power management modes allow the device to go to an extremely low power state which can reduce power consumption significantly.

Device DNA security for the ultimate flexibility in customizing security solutions for high volume, low-cost systems.

Extended Spartan-3A FPGAs offer the ultimate flexibility in customizing security solutions for high volume, low-cost systems.

• Customizable security algorithms utilizing unique Device DNA
• Monitor JTAG access and take action
• Monitor for tampering and alert for a bitstream alteration
• Ability to increase algorithm complexity
• Hidden bitstream deters bitstream snooping
• Tamper resistant packaging
• JTAG lockdown prevents “backdoor” access
• Readback disable to prevent configuration readback via JTAG or ICAP

XtremeDSP DSP48A Slice for advanced DSP functions.

The Spartan-3A platform’s optimized DSP48A slice* (PDF) achieves 250 MHz operation in the slowest speed grade and enables advanced DSP functions to derive over 30 GMACS.

• XtremeDSP™ slices providing advanced MACC functionality
• Configurable logic blocks to store data and implement logic functions
• Precise clock management resources
• Advanced I/O structure
• 18-bit by 18-bit, two's complement multiplier with full precision 36-bit result, sign extended to 48 bits
• Pre-adder saves 9 logic slices per DSP48A used
• Two input, flexible 48-bit adder/subtracter with optional registered accumulation feedback
• DSP co-processing functions such as MAC engines, distributed algorithms and fully parallel FIR filters

* Available only in largest two devices.

Embedded processing to reduce obsolescence risk and inventory costs

MicroBlaze™ soft processor delivers inexpensive, highly functional Linux embedded processing.

• Industry’s most versatile, low-cost embedded processing platform
• Integrate processor into FPGA and reduce BOM
• Reduce obsolescence risks with soft processors
• Reduce inventory cost by using common flexible embedded processing architecture across multiple products

Four level memory architecture for optimal granularity and efficient area utilization

Four level memory architecture (PDF) provides the optimal granularity and efficient area utilization.

• Up to 520 Kb distributed SelectRAM™+ memory
  • Each LUT works as a single-port or dual-port RAM/ROM
  • LUTs can be cascaded to build larger memories
  • Flexible memory for FIFOs, and buffers
• Up to 1.87 Mb embedded block RAM
  • Up to 104 blocks of synchronous 18 Kb block RAM can be cascaded
  • Each 18 Kb block can be configured as a single/dual-port RAM
  • Supports multiple aspect ratios, data-width conversion and parity
• Up to 16 Mb of integrated Flash memory
  • System flexibility with up to 11Mb of on-chip user Flash
  • Single-chip solution for failsafe field upgradeability using MultiBoot feature
  • New benchmark in non-volatile FPGA market  for retention and cycling
• Popular low cost external memory
  • Connects low cost memories via interfaces such as HSTL and SSTL
  • Large system memory requirements

Table 1

Four level memory architecture

Leading connectivity platform for implementing multiple bridging, differential signaling, and memory interfaces with SelectIO™ technology

Implement multiple bridging, differential signaling, and memory interfaces with SelectIO™ technology.

• Supports most popular and emerging single-ended and differential signaling standards including TMDS, PPDS, SSTL3 Class I and II
• Pre-engineered interface IP solutions including PCI™, PCI Express®, USB, Firewire, CAN, SPI, and I2C
• Advanced interfacing supports up to 26 different single-ended and differential I/O standards
• Full hot-swap compliance and 3.3V support
• 622+ Mb/s data transfer rate per I/O

Figure 1

Extended Spartan-3A FPGAs support multiple platform standards

Configurable logic blocks for wider functionality and less logic levels resulting in higher performance

CLB architecture provides wider functionality and less logic levels resulting in higher performance.

• Four slices per CLB - two each for memory and logic functions.
• Wide-input functions - 16:1 mux in one CLB
• Fast arithmetic functions - two look-ahead carry chains per CLB column
• Four cascadable 16-bit addressable shift registers
• Two slices can be configured as distributed memory

Precise clock management resources for distributing, delaying, multiplying, dividing and phase-shifting clock signals

A self-calibrating, fully digital solution for distributing, delaying, multiplying, dividing and phase-shifting clock signals.

• Up to 8 digital clock managers (DCMs)
• Flexible frequency generation from 5 MHz to 333 MHz
• Precision phase shift control for 0 - 360 degrees
• Fine grain control (1/256 clock period) for clock data synchronization
• Precise 50/50 duty cycle generation
• Up to 9 external outputs available for internal or external usage

Comprehensive configuration capabilities for the broadest flash memory support to allow lowest cost configuration

The broadest flash memory support including Platform Flash, SPI and parallel Flash memories allow lowest cost configuration.

• Platform Flash
  • Convenience of a single source supplier for FPGA and flash memory
  • Advanced features such as JTAG, bitsteam compression, design revisiton tracking
  • High speed programming
• MultiBoot capability allow multiple configurations (PDF)
  • Failsafe upgrading
  • Application control of the bitstream selection
  • replacement of large ASIC or multiple FPGAs with a single Spartan-3 generation FPGA
• Third-party support for parallel, high-speed BPI configuration mode
  • Fast parallel configuration speeds
  • Easily procured through standard channels
  • Commonly found on low-cost systems
  • For larger densities, memory can be used for configuration and system functions