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FOR IMMEDIATE RELEASE
XILINX PROVIDES PROVEN XAUI SOLUTION FOR 10 GIGABIT
ETHERNET APPLICATIONS
First programmable 1 & 10 Gigabit Ethernet solutions to complete
University of New Hampshire InterOperability Laboratory conformance
test suites
SAN JOSE, Calif., July 1, 2003 - Xilinx, Inc. (NASDAQ:XLNX) today
announced that it has successfully completed the University of New
Hampshire Interoperability Lab (UNH IOL) IEEE 802.3 conformance
tests for 1 and 10 Gigabit Ethernet Media Access Controller (MAC).
Xilinx also announced successful interoperability testing of its
10 Gigabit Attachment Unit Interface (XAUI) IP core with a number
of 3rd party vendors during several group test sessions. In addition,
Xilinx also announced two new IP cores today, the XAUI and Ethernet
1000BASE-X PCS/PMA LogiCORE™ products. Both cores are available
now for use with Virtex-II Pro™ Platform FPGAs. The two new
IP cores further extend Xilinx's serial interface IP offering, part
of the comprehensive suite of design resources under the High-Speed
Serial Initiative.
"The flexibility of Xilinx Platform FPGAs enabled Xilinx to
complete the Ethernet MAC conformance testing with a surprisingly
short test cycle," said Bob Noseworthy, 10 Gigabit Ethernet
Consortium Manager at UNH IOL. "Xilinx's in-house Ethernet
expertise worked to deliver a solid and robust 10 Gigabit Ethernet
solution."
By successfully completing the UNH IEEE 802.3 conformance tests
for Ethernet MAC and by demonstrating interoperability with networking
equipment incorporating standard gigabit Ethernet devices, Xilinx
is providing IP solutions that significantly reduce the hardware
testing burden for customers and accelerate their time to market.
In addition, Xilinx' participation in three XAUI group tests has
resulted in an extensive portfolio of XAUI devices with which the
Virtex-II Pro FPGA using the XAUI IP core can interoperate. Customers
using Virtex-II Pro FPGAs and Xilinx 1 & 10 Gigabit Ethernet
IP cores are ensured first time design success and seamless operation
with other 1 & 10 Gigabit Ethernet standard devices in their
networking and telecommunication systems.
Ethernet 1000BASE-X PCS/PMA and XAUI LogiCORE Offerings
The new 1000BASE-X PCS/PMA and XAUI cores can be used in the development
of emerging 1 & 10 Gigabit networking and telecom equipment.
Both cores are parameterizable and customizable via the Xilinx CORE
Generator software. The 1000BASE-X core is designed to the IEEE
802.3-2002 standard, and is available with a choice of two PHY side
interfaces: a 1000BASE-X PCS with Ten Bit Interface (TBI), or an
integrated 1000BASE-X PCS/PMA which allows designers to simplify
their board designs. The XAUI core utilizes four channel-bonded
Virtex-II Pro RocketIO™ transceivers to provide a 4-lane high-speed
serial interface offering 10 Gigabits per second (Gbps) total data
throughput. Included with the XAUI core are the XGMII Extender Sublayers
(DTE and PHY XGXS) and the 10GBASE-X sublayer, as described in clauses
47 and 48 of IEEE 802.3ae-2002. Both cores can be used in bridging
applications to transfer Ethernet frames across non-Ethernet media
when protocol termination is not required. In addition, free FIFO
design examples are available now for current GMAC & 10GMAC
customers providing full line rate support for back-end user logic.
Licensing, Pricing and Availability
The Ethernet 1000BASE-X PCS/PMA and XAUI cores are available now
as LogiCORE™ products under the terms of the SignOnce IP license
and are downloadable from www.xilinx.com/connectivity. The site
license price for the 1000BASE-X PCS/PMA core is $5000, while the
XAUI core is provided free of charge. Both cores are available for
use in Virtex-II Pro Platform FPGAs using ISE 5.2i with Service
Pack 2 or later revision software. Free user-side FIFO design examples
are available for download in the respective product lounges for
current 1 & 10 GMAC licensee customers. More details regarding
these new 1 and 10 Gigabit Ethernet IP cores and other Xilinx connectivity
solutions can be found at www.xilinx.com/connectivity. To obtain
a copy of the UNH test results, customers may contact their local
Xilinx sales representatives.
About High-Speed Serial Initiative
The Xilinx High-Speed Serial Initiative, announced October 21, 2002
is designed to accelerate the industry move from parallel to serial
I/O technology by delivering next generation connectivity solutions
that meet bandwidth requirements from 3.125 Gbps today to 10 Gbps
and beyond. For complete information about the High-Speed Serial
Initiative initiative, visit www.xilinx.com/connectivity.
About UNH InterOperability Laboratory
The University of New Hampshire Research Computing Center's InterOperability
Laboratory (IOL) is a world renowned, highly respected center of
data communications technology research, testing, and education.
The lab enjoys a reputation for expertise not only in testing and
test procedure development, but also in the interpretation of technical
specifications and resolution of conflicts within the specifications
themselves and between different implementations. By bringing companies
together as a consortium in a neutral environment and leveraging
collective resources to develop a common test bed, test methodologies,
and test tools, the IOL is able to provide a service that most companies
couldn't afford to do in-house. For more information, visit www.iol.unh.edu.
About Xilinx
Xilinx is the worldwide leader in complete programmable logic
solutions. For more information, visit www.xilinx.com.
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