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FOR IMMEDIATE RELEASE
XILINX ENABLES INSTANT DEPLOYMENT OF AURORA,
INDUSTRY'S MOST POPULAR, SCALABLE, LIGHTWEIGHT
SERIAL CONNECTIVITY PROTOCOL
Latest Aurora Reference Design V2.2 From Xilinx
Enables Most Efficient
Serial Point-to-Point Connectivity For Chip-to-Chip and Backplane
Applications
SAN JOSE, California, December 9, 2004 - Xilinx, Inc. (NASDAQ:
XLNX) today announced the availability of FPGA-based Version 2.2
reference design cores for the high-speed serial I/O protocol Aurora.
Specifically geared for Xilinx Virtex-II Pro™ X programmable
solutions, the Aurora 2.2 release enables the widest range of chip-to-chip,
backplane, box-to-box and board-to-board connectivity applications
to communicate from 600 Mbps to 10 Gbps per lane. With the new Aurora
2.2 release (adding simplex mode and a streaming interface) Xilinx
now has the most comprehensive set of solutions for Aurora, a scalable,
lightweight, link-layer protocol that can be used to transmit data
across point-to-point serial lanes while eliminating the resource
inefficiencies of other serial protocols.
Aurora offers the industry's lightest core in comparable implementations,
being two to four times smaller than the next competing solution.
Further, the Aurora protocol's popularity has been surging with
more than 4100 licenses to date and is used by designers for a diverse
range of serial connectivity applications, including medical imaging
equipment, wired and wireless infrastructure, broadcast communications
systems, video servers, aerospace, aerospace and defense applications
and industrial controllers.
According to Andy DeBaets, senior director, Systems and Application
Engineering at Xilinx, "For many applications that require
serial data transfer in only one direction, a duplex implementation
is redundant and costlier than necessary. With the addition of simplex
modules in the reference cores, customers can incorporate easier
designs overall, efficiently implementing one-way serial transport
with significant savings in logic resource utilization, as well
as in interconnect and connector costs. More importantly, the use
of Aurora with Xilinx Virtex-II Pro X FPGAs enables designers to
efficiently meet stringent performance requirements with the flexibility
of programmable devices and bandwidth scalability to future proof
designs."
The new 2.2 release supports an additional word-based interface
for data streaming in systems without frames. The streaming data
interface with Aurora is extremely efficient both in terms of multi-gigabit
data overhead and minimal logic usage in the fabric.
About the Aurora Protocol
Aurora is an open protocol, licensed at no cost, which can be implemented
in any silicon device/technology including FPGAs, ASICs and ASSPs.
It provides a transparent interface to the physical serial links,
allowing easy use of the links for carrying data from proprietary
or industry standard protocols such as Ethernet or TCP/IP. This
leads to higher connectivity performance while preserving software
infrastructure investment.
About the Aurora Reference Design Version 2.2
Xilinx CORE Generator™ delivers new, fully-parameterized Aurora
reference designs that provide multi-lane 8B/10B channels with up
to 10 Gbps per lane for a Xilinx Virtex-II Pro X device. The newest
release of the Aurora reference design features simplex modules
for one-way traffic, streaming interfaces for systems without frames,
virtually unlimited bonded lanes with up to 10 Gbps per lane providing
prodigious bandwidth scalability, optional native flow control and
optional user flow control for data management. For more information,
please visit www.xilinx.com/aurora.
Deliverables & Availability
All Aurora deliverables are available free of charge from the Xilinx
web site at http://www.xilinx.com/aurora
upon acceptance of a license agreement. These include the Aurora
Protocol Specification, Aurora reference designs, Xilinx LocalLink
Interface Specification and supporting demonstration designs for
standard Xilinx development boards. The Aurora bus functional model
is also available free of charge.
About Xilinx Virtex-II Pro X FPGAs
Xilinx Virtex-II Pro X FPGAs incorporate up to 20 RocketIO™
multi-gigabit transceivers, supporting operating ranges of 2.488
Gbps to 10.3125 Gbps per channel. Virtex-II Pro X FPGAs are the
first programmable ICs that can directly drive optical transceiver
OC-48 SONET compliant systems and support SONET implementation for
OC-192 data rates and above. Virtex-II Pro X FPGAs also enable new
applications, which require multiple high-speed serial channels
each running at speeds up to 10.3125 Gbps, including popular bandwidth
nodes such as 4.25 Gbps, 5 Gbps, and 6.25 Gbps. The 10 Gbps transceivers,
when used in multiples, support effective bandwidths through the
FPGA of more than 200 Gbps.
About the Xilinx High-Speed Serial Initiative
Today's announcement marks another milestone for the Xilinx "High-Speed
Serial Initiative" established to accelerate the industry's
migration from parallel to high-speed serial I/O by delivering a
new generation of connectivity solutions for system designers. In
all, providing FPGA solutions for the Aurora protocol is compliant
with making the High-Speed Serial Initiative vision a reality today.
The trend toward high-speed serial connectivity is being driven
by companies across a wide range of industries as a means to reduce
system costs, simplify system design, and provide scalability to
keep pace with current and future bandwidth requirements. Serial
solutions will ultimately be deployed in nearly every aspect of
every electronic product imaginable, from chip-to-chip interfacing,
backplane connectivity and system boards to box-to-box communications.
About Xilinx
Xilinx is the worldwide leader in complete programmable logic
solutions. For more information, visit www.xilinx.com.
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