FOR IMMEDIATE RELEASE

XILINX AND ACCELCHIP DELIVER INDUSTRY'S FIRST DESIGN FLOW FROM MATLAB/SIMULINK AND SYSTEM GENERATOR TO VERIFIED FPGA SYSTEM

New Integration between AccelChip DSP Synthesis and Xilinx System Generator Accelerates Embedded Digital Signal Processing Design

SAN FRANCISCO (Embedded Systems Conference), March 8, 2005 - Xilinx, Inc. (NASDAQ: XLNX), the worldwide leader in complete programmable logic solutions and AccelChip Inc., a leading provider of embedded DSP technology for accelerating design, today announced the immediate availability of a new interface between AccelChip® DSP Synthesis and Xilinx System Generator for DSP tools which enables rapid development of high performance digital signal processing (DSP) and communications systems. Jointly developed by Xilinx and AccelChip, this new interface enables designs captured in The MathWorks' MATLAB® language to be rapidly incorporated into System Generator designs for implementation and verification.

System Generator for DSP is the framework for developing and debugging high performance DSP systems for Xilinx's advanced FPGAs. System Generator, together with The MathWorks' Simulink tool, provides the graphical design environment commonly used by system architects and hardware designers.

The AccelChip DSP Synthesis tool and AccelWare® DSP IP cores let algorithm developers synthesize RTL from MATLAB, their preferred language for DSP design. AccelChip's 2005.1 release extends this hardware design flow with a direct link to System Generator. The new interface automatically generates a verified System Generator IP block based on a MATLAB model, enabling cycle-accurate Simulink simulation and hardware synthesis from the System Generator environment.

"This combination of our System Generator flow and AccelChip's MATLAB language-based flow is an extremely powerful combination," said Jim Hwang, director of DSP Design Tools and Methodologies, the DSP Division at Xilinx. "The unique combination for Xilinx customers leverages the best of both environments, simplifying the overall design of DSP circuits for Xilinx devices."

"Many of The MathWorks' customers use a combination of MATLAB for algorithm development and Simulink for system-level design and integration," said Ken Karnofsky, marketing director for Signal Processing and Communications at The MathWorks, Inc. "MATLAB is an intuitive language and technical computing environment with advanced data analysis and visualization for algorithm development. Simulink with System Generator for DSP is an outstanding simulation and prototyping environment. Through the efforts of AccelChip and Xilinx, DSP design teams can now leverage the strengths of each environment."

AccelChip DSP Synthesis and AccelWare parameterized DSP IP cores leverage MATLAB's ability to perform linear algebra, a key strength of MATLAB as a design language for DSP algorithm development. In addition to providing the industry's first tool to produce fixed-point hardware implementations of matrix inversion and factorization, AccelChip provides complete support for the most commonly used MATLAB constructs for matrix operations, as well as Galois mathematics used in forward-error-correction algorithms. AccelWare toolkits are available for communications, signal processing, and advanced math IP cores.

System Generator automates the design, debug, and deployment of Xilinx-based FPGAs. In addition to a rich set of DSP core libraries for high-level modeling and automatic validation code generation, System Generator provides a high-speed HDL co-simulation interface, system-level resource estimation, and high-speed hardware co-simulation interfaces for design verification using FPGA hardware platforms.

"Our AccelWare IP cores, combined with our comprehensive support of the MATLAB language, make the AccelChip product the ideal solution for creating and verifying DSP blocks," said Vin Ratford, president and CEO, AccelChip. "By combining AccelChip DSP Synthesis with the tight coupling between System Generator's integrated hardware-in-the-loop flow and the Xilinx Embedded Development Kit, we now provide a complete solution for rapid implementation of next-generation DSP designs. This new solution allows algorithms to be verified in hardware in a fraction of the time it previously took."

Pricing and Availability
AccelChip DSP Synthesis, version 2005.1, is currently shipping. Current AccelChip customers, on support, will receive the new release at no additional fee. The System Generator interface is an option to AccelChip DSP Synthesis and is priced starting at $1000. For more information on AccelChip DSP Synthesis and AccelWare IP, please email sales@accelchip.com.

About the Companies
AccelChip Inc. is the industry's only provider of MATLAB-based algorithmic synthesis solutions, including DSP intellectual property (IP), for embedded DSP design. The company develops and markets design tools, integrated verification flows, and parametric IP toolkits that combine to automate the development and implementation of DSP algorithms in FPGAs and ASICs. AccelChip's proven solution integrates the domain-specific DSP design environment (MATLAB) with industry-standard hardware design flows from Aldec, Altera, Cadence, Mentor Graphics, Synplicity, Synopsys, The MathWorks, and Xilinx. Founded in 2000, AccelChip is located in Milpitas, California, and has design centers in Portland, Oregon, and Carlsbad, California. AccelChip's Web address is www.accelchip.com.

For more information on Xilinx System Generator for DSP, visit www.xilinx.com/systemgenerator_dsp.

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AccelChip, AccelWare, and AccelView are registered trademarks of AccelChip Inc. Xilinx is a registered trademark of Xilinx, Inc. MATLAB and Simulink are registered trademarks of The MathWorks. All other trade names referenced are the service marks, trademarks, or registered trademarks of their respective companies.