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FOR IMMEDIATE RELEASE
MEDIA ALERT FOR EE TIMES/XILINX
NETSEMINAR
What: EE Times/Xilinx High-Speed Serial Initiative NetSeminar
When: December 18, 2002 at 11:00 AM PST / 2:00 PM EST
Where: www.xilinx.com/serialseminar
The Inevitable Move from Parallel to Serial I/O
In this one-hour, in-depth NetSeminar, an expert panel of technologists
will explore the challenges and opportunities inherent in designing
multi-gigabit systems at speeds ranging from 1Gbps to 10Gbps and
beyond. In this free, one-hour online forum - titled "High-Speed Serial Initiative:
The Inevitable Move from Parallel to Multi-Gigabit Serial I/O. Is
Your Company Ready to Ride the Wave?" - members of the press, system
architects, designers and engineering managers will gain a better
understanding of the cost and performance benefits of making the
move from parallel to serial I/O.
Featured Panelists:
- Chuck McManis, Technical Director, Scalable Systems Architect,
Network Appliance, Inc.
- Dan Bouvier, PowerPC Architecture Manager, Motorola SPS; Chairman,
RapidIO Trade Association
- Mark T. Feuerstraeter, Communications Principal Architect for
the Intel Communications Group
- Marwan Hassoun, Senior Director of Engineering, Xilinx
Moderator:
- Rick Merritt, Editor-at-Large, EE Times
Ideal News Opportunity for Members of the Press
The High-Speed Serial Initiative NetSeminar is an ideal opportunity for members
of the press to hear a panel of renowned serial I/O experts from
Intel, Motorola, Network Appliances and Xilinx regarding the opportunities
and challenges associated with designing serial systems.
To register visit www.xilinx.com/serialseminar
About Xilinx
Xilinx is the worldwide leader in complete programmable logic
solutions. For more information, visit www.xilinx.com.
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| Editorial contact: |
| Jennifer Van Every |
| Xilinx Public Relations |
| (408) 879-7727 |
| jennifer.vanevery@xilinx.com |
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