Company|about

 


Press Room
   
Press Kits 
Xilinx in the News 
Management Photos 
Product Photos
Glossary of Terms
Worldwide Media Contacts
Home : Company Info & Press : Press Room : Press Releases : Xilinx Press Release #02113

Xilinx Press Release #02113
 
FOR IMMEDIATE RELEASE

ENDEAVOR DELIVERS CO-DESIGN/CO-VERIFICATION SOLUTION FOR XILINX VIRTEX-II PRO FPGAS WITH GROUNDBREAKING PRICNG AND SIMPLICITY

Endeavor’s CoSimpleTM Provides PowerPC Modeling with Direct HDL Synchronization for Under $10,000

Hillsboro, Ore. and San Jose, Calif. July 23, 2002—Endeavor Intertech Corporation and Xilinx, Inc. (NASDAQ: XLNX) today announced a CoSimple™ hardware/software co-simulating solution from Endeavor for the Xilinx® Virtex-II ProTM FPGAs, containing the IBM PowerPCTM 405 processor core. Endeavor’s Virtex-II Pro CoSimple tool is the first EDA tool to address both the unique requirements of the Platform FPGA customer in a package that caters to the budgetary realities associated with today’s economy. 

CoSimple, the latest of Endeavor’s Unified SimulationTM product line, contains Endeavor’s TransAccurateTM instruction set simulator, rich interactive debugging capabilities based on the GNU gdb interface, and a cycle-accurate Virtual Bus Model. CoSimple boasts flexible synchronization and communication with hardware simulators like Model Technology’s ModelSim Verilog and VHDL products. For under $10,000 in single quantities, CoSimple provides virtually the same co-verification capabilities of existing co-verification environments, in a simple-to-use package. 

“Endeavor’s CoSimple model provides a cost-effective mechanism for high performance, interactive debugging of both the hardware and software components of the Virtex-II Pro FPGA,” said Rich Sevcik, senior vice president FPGA Products. “Software developers can now develop and test final, unmodified applications in parallel with the hardware effort, shaving months off of time-to-market. For the hardware developer, CoSimple makes it possible to verify even the most difficult-to-test hardware components because the actual application software can be used to verify components under final design conditions.”

CoSimple interfaces to the free GNU tools available through Xilinx pre-targeted to the Virtex-II Pro and the PowerPC 405 core. The well-known GNU gdb debugger provides the essential user interface to the co-simulating model, with complete support for source debugging, breakpoints, interrupts, and memory accesses. Under the surface, CoSimple is not only simulating instructions for the debugger, but also providing the inter-process communication and synchronization between the software debugger and the hardware debugging environment. Thus, hardware developers can, for example, run test vectors, break on a specific location, and compare resultant waveforms.

Pricing and Availability

CoSimple for the Virtex-II Pro direct-to-HDL hardware/software co-verification package is available immediately on Solaris, and soon on Windows PC. It includes the TransAccurate ISS, PPC405 BFM, GNU debugger, and has interfaces to a Model Technology ModelSim or Synopsys VCS HDL simulator. Endeavor is at work on support for Cadence’s NC-Sim and family products as well. For US $9,999 (quantity one), no additional tools or EDA environments are necessary. 

The TransAccurate PPC405 model for the Virtex-II Pro can be licensed separately from CoSimple, for designers that require integration with their own simulation environments. Endeavor’s TransAccurate PPC405 core ISS models (with and without Virtex-II Pro enhancements) are available immediately on Sun workstations for US$7,999. PC and Linux versions will be available soon. 

About Endeavor Intertech Corporation

Endeavor is the only co-verification EDA tool company currently addressing the needs of an industry that demands more productivity on tighter budgets. Endeavor specializes in Unified Simulation, an Integrated Simulation Environment (ISE) consisting of high performance processor models, co-simulation interfaces and tools for hardware and software verification. Endeavor has been in the business of developing EDA tools and models since 1997, and has quietly established itself as a leading model developer for its EDA and processor design customers. Endeavor creates processor and virtual bus models for DSP, VLIW, RISC, and other embedded cores and processors.

For more information on Endeavor’s processor models and other hardware/software verification tools, please contact your Endeavor Intertech representative at info@endeav.com, or 1-503-628-6200 x100. See Endeavor Intertech on the web at http://www.endeav.com.

About Xilinx

Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader in programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com.

###

CoSimple, TransAccurate and CoOperate are trademarks of Endeavor Intertech Corporation. The PowerPC name is a registered trademark of IBM Corp., and is used under license therefrom. Other brands and products referenced herein are the trademarks or registered trademarks of their respective holders.
 
For more information, contact: 
David N. Glass Ann Duft
Endeavor Intertech Corporation Xilinx, Inc.
(503) 628-6200 x100 (408) 879-4726
glass@endeav.com ann.duft@xilinx.com
 
#02113

/csi/footer.htm