FOR IMMEDIATE RELEASE

CYPRESS AND XILINX ACCELERATE DEPLOYMENT OF NEXT-GENERATION DATA OVER SONET/SDH SOLUTIONS FOR METRO AREA NETWORK APPLICATIONS
Design Platform Demonstrates Transport of Gigabit Ethernet, Fibre Channel, ESCON and FICON Over a Virtually Concatenated OC-48/STM-16 Datalink

SAN JOSE, Calif., July 30, 2003 - Cypress Semiconductor Corporation (NYSE:CY) and Xilinx, Inc. (NASDAQ: XLNX) today announced the collaborative co-development of reference designs for next-generation communications and memory products. The first product resulting from the newly formed relationship between Cypress and Xilinx through the Xilinx Reference Design Alliance Program is a reference design for implementing a complete "Fiber-to-Fiber" data over SONET/SDH solution. Further designs targeting packet-processing applications are currently in development by the two companies.

The design - which uses transparent generic framing procedure (GFP-T) for data encapsulation and virtual concatenation for optimal bandwidth utilization - deploys two client channels over SONET, each independently configurable for multi-protocol standards, including any combination of Gigabit Ethernet (GbE), Fibre Channel, Enterprise Systems Connection (ESCON), and Fibre Connectivity (FICON).

By leveraging Cypress's MetroLink2T-2TM core to implement GFP-T functions, the reference design is optimized for the Xilinx Virtex-IITM FPGA. Cypress's MetroLink core is the first Link Layer Device (LLD) on the market to offer GFP-T. The Virtex-II device uses flexible SelectI/O-Ultra™ technology to seamlessly interface to Cypress's POSIC2GVC™ SONET/SDH framer and HOTLink™ II serializer/deserializer (SERDES).

"Using the Virtex-II device to implement the MetroLink2T-2 link-layer function enabled us to provide our customers with a complete metro-transport solution quickly and with little risk as their requirements evolve throughout the design cycle," said Geoff Charubin, director of marketing for Cypress's Data Communications Division. "Using this reference design, Multi-Service Provisioning Platform (MSPP) and dense wavelength division multiplexing (DWDM) manufacturers can quickly bring a GFP-T platform to market, allowing their system architects to focus on higher-layer functions within their system and differentiating their solution vs. the competition."

"We are pleased to work with Cypress to further demonstrate the capability of our Virtex-II FPGAs in advanced packet processing solutions," said Jerry Banks, director of Partnerships and Alliance marketing at Xilinx. "This joint reference platform includes the Cypress MetroLink LLD core implemented on the Xilinx Virtex-II FPGA and enables communication system designers to bring 'SONET over any protocol' to market more quickly."

As part of the interoperability testing, critical interface timing between the POSIC2GVC framer, the HOTLink II SERDES and the FPGA have been completed and verified - a complete reference design with application note, including Verilog and VHDL code, is included to speed time-to-market. Cypress's participation in the Xilinx Reference Design Alliance Program means the companies will jointly market the reference design board, cross-reference their application notes and product data sheets on each other's web sites, and provide layout guidelines and board schematics. For more information on the reference design, visit http://www.xilinx.com/company/reference_design/cypress.htm.

Xilinx Reference Design Alliance Program
The Xilinx Reference Design Alliance Program (www.xilinx.com/reference_design/) builds partnerships with industry leading semiconductor and design companies to develop reference designs for accelerating product development and improving time-to-market. The reference designs are ideal for a wide variety of electronic systems, including networking, communications, video imaging, DSP, optical networks, and emerging market applications.

About Cypress
Cypress Semiconductor Corporation (NYSE: CY) is Connecting From Last Mile to First Mile™ with high-performance solutions for personal, network access, enterprise, metro switch, and core communications-system applications. Cypress Connects™ using wireless, wireline, digital, and optical transmission standards, including USB, Fibre Channel, SONET/SDH, Gigabit Ethernet, and DWDM. Leveraging its process and system-level expertise, Cypress makes industry-leading physical layer devices, framers, and network search engines, along with a broad portfolio of high-bandwidth memories, timing technology solutions, and programmable microcontrollers. More information about Cypress is accessible online at www.cypress.com.

Cypress, the Cypress logo and RoboClock are registered trademarks of Cypress Semiconductor Corporation. "Connecting From Last Mile to First Mile", "Cypress Connects", POSIC2GVC, HOTLink, No Bus Latency, MetroLink2T-2, and NoBL are trademarks of Cypress. All other trademarks are the property of their respective owners.

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