FOR IMMEDIATE RELEASE

XILINX RELEASES FREE VIRTEX-II PRO ULTRACONTROLLER DESIGN TO MAXIMIZE DEVICE UTILIZATION AND ACCELERATE SYSTEM DESIGN
Bridging FPGA logic centric and processor centric designs, the pre-configured UltraController minimizes system development effort while maximizing logic utilization

SAN JOSE, Calif., October 27, 2003 - Xilinx, Inc. (NASDAQ: XLNX) today announced the immediate availability of an ultra-compact, general purpose controller that utilizes the existing IBM PowerPC™ 405 processor core immersed in the Virtex-II Pro™ FPGA device family. Pre-configured and self-contained (no FPGA pins or external devices required) the Xilinx UltraController™ reference design allows customers to quickly and easily leverage the Virtex-II Pro embedded PowerPC 405 core using the industry standard GNU-based tools and Xilinx Integrated Software Environment (ISE) design flow.

By using the UltraController reference design, FPGA logic resources previously used for complex state machines or non-performance critical functions, can now be "off-loaded" onto the Virtex-II Pro PowerPC, thereby significantly increasing the device utilization. Depending on design complexity, functional partitioning between fabric logic and the embedded PowerPC processor enables design migration to a smaller device for cost reduction.

"The UltraController is an ideal solution to implement our SONET bit error rate detection algorithm -- an essential element in any carrier class network element," said Bob Cantwell, director of ASIC/FPGA Engineering at Ceterus Networks. "By substituting an UltraController implementation of this function in place of an existing CLB implementation, we are saving approximately 10% of the resources in a XC2VP20."

"We are extremely pleased with the response to the UltraController reference design," said Dan Isaacs, principal engineer for Embedded Processing, Xilinx Advanced Products Division. "With well over 2000 design downloads, rapid customer adoption of the UltraController design is already being recognized. From industrial to medical to communications to consumer applications, the fast adoption over a wide base of applications demonstrates the ease of use and versatility the UltraController reference design provides to customers."

Supporting thirty-two general-purpose I/Os and two memory sizes (16KB or 32KB), the Xilinx UltraController design occupies well under 50 logic cells while delivering up to 220 Dhrystone MIPS at 200 MHz (with a low 0.9 mW/MHz power consumption). Verilog and VHDL source code is available for immediate download. Step-by-step quick start and advanced tutorials, including example reference designs and software are available from the Xilinx website at www.xilinx.com/ultracontroller.

The UltraController design development is fully supported by industry standard development tools including simulation (ModelSim PE and SE), system debug (GNU-based GDB and Xilinx ChipScope Pro) and a wide selection of available third party and Xilinx Virtex-II Pro development boards.

Customization of the Xilinx UltraController design is simplified via the recently announced Embedded Development Kit (EDK) version 6.1, merging the standard ISE hardware flow with the embedded processor development. Through a user friendly GUI and easily followed pull down menus, customers can rapidly modify the UltraController reference design to meet their specific requirements.

Availability
The UltraController reference design supporting Virtex-II Pro devices is now available to download free of charge at www.xilinx.com/ultracontroller. For more information about Xilinx Embedded Processor solutions, visit Processor Central at www.xilinx.com/processor. For information on EDK, visit www.xilinx.com/edk.

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