SAN JOSE, Calif., June 10, 2002—Xilinx, Inc. (NASDAQ:XLNX), the leader in programmable logic solutions, announced today that leading electronic system level (ESL) and EDA vendors support the on-demand architectural synthesis design methodology enabled by the new Xilinx Virtex-II Pro^TM FPGAs. This methodology is realized through the complete palette of system level technologies that make up the Virtex-II Pro solution, including the Virtex-II^TM fabric, PowerPC processors, Rocket I/O^TM multi-gigabit serial transceivers and the ecosystem of support tools through Xilinx alliances.

Virtex-II Pro Family Enables On-Demand Architectural Synthesis

The term architectural synthesis refers to a methodology that lets the system designer define the system architecture at a high level of abstraction and then synthesize a range of implementations. With architectural synthesis, system architects can explore hardware/software tradeoffs as well as hardware implementations, in order to optimize the cost and performance for the target application.

The benefits of architectural synthesis have been limited for two reasons. First, difficulties in verifying the results through system level simulation or the long and expensive process of using ASIC technology mean that feedback from architectural exploration comes too late to be useful. Second, when using ASIC technology, architectural synthesis could only be used early in the design process. With the Xilinx Virtex-II Pro technology, architectural optimization can be done at any stage of system development: during definition, during debug, and after the product ships.

“On-demand architectural synthesis greatly expands the concept of architectural synthesis by providing immediate deployment,” said Erich Goetting, vice president and general manager of the Advanced Products Group at Xilinx. “Using this new capability, only available in our Virtex-II Pro devices, allows our customers to rapidly explore a wide range of implementations and get rapid, real world feedback about tradeoffs. On-demand architectural synthesis represents the shortest path from whiteboard to silicon at any stage of product development.”

Support from Leading ESL and EDA Partners

“Providing the ability to make system-level architectural tradeoffs is another deliverable of the Cadence/Xilinx Alliance formed earlier this year,” said Rahul Razdan, vice president and general manager of the System and Functional Verification Group at Cadence Design Systems, Inc. “Integration of the Xilinx CORE Generator with our popular SPW signal processing workbench solution brings this capability to Virtex-II users, and can help them speed time to market. Our open verification solutions including NC-Sim, Verification Cockpit and TestBuilder based on SystemC, Verilog and VHDL also can help Xilinx and other customers get to silicon faster.”

“Hardware designers, system architects, and software engineers must be to able collaborate in all phases of the design to fully benefit from a single chip system that implements new architectures on-demand and accelerates compute-intensive CPU functionality in FPGA fabric,” said Kjell Torkelsson, vice president of Engineering at Celoxica Limited. “By introducing software methodologies to hardware design, Celoxica provides a significantly more efficient environment for rapid implementation of the right mix of hardware and software functionality by providing a language and a set of tools accessible to all designers.”

"In today's huge systems-on-programmable chips, the hardware design problem shifts dramatically away from custom logic design, towards IP block re-use, and accelerating the right elements of the software in hardware. Accordingly, the architectural synthesis issues are dominated by the hardware-software partition as well as the communication between software running on processor(s), re-used hardware IP, and new custom logic across complex buses," stated Guido Arnout, chairman of CoWare, Inc. "CoWare N2C provides Virtex-II Pro designers with the appropriate analysis environment and synthesis technology to implement the right thing for the right reason."

"The ability to quickly try out multiple candidate implementations by using high-level synthesis with an FPGA-based SOC gives the designer a much better chance of finding an optimum architecture", observed John Sanguinetti, CTO of Forte Design Systems. "Forte's new Cynthesizer product supports this kind of architectural exploration by automatically generating candidate RTL implementations from SystemC C++ algorithms given a set of latency and resource constraints."

"On-demand architectural synthesis is a key methodology for creating advanced programmable SoCs," said Michael Bohm, chief scientist for the Mentor Graphics Synthesis Group. "Mentor Graphics has devoted significant focus to this technology area for the next generation of our FPGA design solution, including verification, simulation, and synthesis tools. Mentor's partnership with Xilinx allows designers to combine state-of-the-art EDA tools and silicon, setting the stage for true platform-based design."

"Having pioneered SystemC-based design and verification, we have been working with Xilinx to incorporate our CoCentric system-level design tools into Xilinx's advanced hardware/software design methodology for the Virtex-II Pro FPGAs,” said Joachim Kunkel, vice president and general manager, System Level Design, Synopsys. “CoCentric SystemC Compiler, through its unique FPGA Compiler II based timing convergence capability, enables designers to rapidly retarget algorithms written in C from a software implementation to a production quality FPGA hardware implementation. This enables them to explore hardware/software tradeoffs as well as different hardware implementations.”

"The Virtex II Pro devices offer exceptional benefits when it comes to hardware-software partitioning" said Stuart Newton, Corporate Alliance Manager at Wind River Systems. "The ability to change the partitioning decisions throughout the development cycle and beyond, combined with the close-coupling of the CPU and FPGA fabric, make the Virtex II Pro family an extremely powerful platform for system optimization. We are delighted to be working with Xilinx to provide our software profiling and timing analysis technology to further enable on-demand architectural synthesis."

About Xilinx 

Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader in programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com.

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