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FOR IMMEDIATE RELEASE
XILINX VIRTEX-II PRO FPGAS ARE 38% FASTER THAN
COMPETITIVE OFFERINGS USING ISE 6.1I DESIGN TOOLS
Independent benchmarks confirm Xilinx ISE 6.1i Place and Route
tools offers near-optimal performance
SAN JOSE, Calif., December 17, 2003 - Xilinx, Inc. (NASDAQ: XLNX)
today announced new performance numbers for its leading-edge Virtex-II
Pro family using Xilinx ISE 6.1i design tools. Recent benchmark
tests confirm that designs using ISE 6.1i with Synplicity v7.3 Synplify
on Virtex-II Pro FPGAs are on average 38 percent faster than the
nearest competitive offering. This dramatic performance edge includes
design compile times up to 2X faster than competitive offerings
and provides customers with the advantage of over two additional
speed grades. With Xilinx's software and silicon speed advantages,
customers can now reach their design performance targets faster
and lower overall design costs.
"ISE continues to demonstrate superior performance in programmable
logic design," said Rich Sevcik, senior vice president of the
Xilinx FPGA Products Group. "With two additional speed grades
from superior software and silicon, PLD designers can save up to
60 percent on their overall logic costs by using Xilinx solutions.
Our proven software and silicon leadership continues to accelerate
the industry-wide transition from ASICs to FPGA technology."
The Near-Optimal Placement and Routing Results
Additionally, independent benchmark tests presented at the International
Conference on Computer-Aided Design (ICCAD) showed that Xilinx ISE
Place and Route tools produce near-optimal timing-driven solutions.
In the ICCAD paper on Optimality and Stability in Timing-Driven
Placement Algorithms by researchers from the University
of California, Los Angeles (UCLA) 17 Microelectronics Center of
North Carolina (MCNC), benchmarks demonstrated that Xilinx Place
and Route tools came between 8.3 and 4.1 percent of the time-optimal
solutions.
"As part of our placement optimality study, we generated a
set of placement benchmark examples with known optimal solutions.
Our study showed the Xilinx Place and Route tools produced consistently
near-optimal timing results on Virtex-II Series devices," said
Dr. Jason Cong, Professor of UCLA Computer Science Department, the
faculty member who directed the research. "We believe the excellent
placement timing results were achieved by employing advanced timing-driven
placement algorithms with efficient exploitation of the segmented
routing architecture used in the Virtex-II Series FPGAs." This
is the first time a quantitative timing optimality study has been
reported on any FPGA placement and routing tools.
Price, evaluation version, platform and availability
ISE 6.1i supports all leading-edge Xilinx product families including
the company's Virtex-II Pro Series FPGAs, Spartan-3 Series FPGAs,
and CoolRunner-II CPLDs. All versions of ISE software packages support
Windows 2000 and Windows XP and ISE Foundation, ISE Alliance,
and ISE BaseX also support native Linux RedHat versions 7.3
and 8.0. ISE Foundation and ISE Alliance also support
Solaris. ISE is also available in the free downloadable ISE WebPACK
configuration. ISE is also available in a free, time-limited, full-featured
evaluation version at www.xilinx.com. For more details on ISE please
visit www.xilinx.com/ise.
About Xilinx
Xilinx is the worldwide leader in complete programmable logic
solutions. For more information, visit www.xilinx.com.
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