FOR IMMEDIATE RELEASE

XILINX RELEASES ACTIVITY SCHEDULE FOR
EMBEDDED SYSTEMS CONFERENCE BOSTON 

SAN JOSE, Calif., August 29, 2005 – Xilinx, Inc. (NASDAQ:XLNX) will showcase the latest releases of its embedded processing solutions at the upcoming Embedded Systems Conference, September 12-15, in the Hynes Convention Center, Boston, Massachusetts.

Xilinx and Avnet will host free 60-minute interactive workshops for ESC attendees that offer a hands-on experience for designing real-time systems with the flexible Xilinx® MicroBlaze™ soft processor or industry-standard PowerPC™ hard processor. Each attendee will have access to a programmable hardware platform to design, debug and boot live embedded systems.

In addition, Xilinx experts and industry partners will offer product demonstrations, in addition to technical papers as part of the ESC Technical Program. ESC attendees are also invited to attend an open reception hosted by Xilinx and Avnet on September 13 th at 5:00 p.m. in booth #501.

Xilinx and Avnet Offer Free Hands-On Workshops – Booth #501!

Offered on first-come, first-serve basis. Early registration is strongly encouraged.
http://www.xilinx.com/events/tradeshows/escb05/index.htm

High Performance Design with Embedded PowerPC and Co-Processor Code Accelerators
Tuesday, September 13: 12:00 noon, 2:30 p.m. and 5 p.m.
Wednesday, September14: 11:15 a.m. and 1:45 p.m.

Learn To Build and Optimize MicroBlaze Soft Processor System in Minutes
Tuesday, September 13: 1:15 p.m. and 3:45 p.m.
Wednesday, September 14: 10 a.m., 12:30 p.m. and 3 p.m.

• Virtex™-4 FX FPGA devices with high-performance PowerPC processor cores, reference boards and complete development kits
• Low cost and flexible embedded processing with the Spartan™-3 family of FPGAs featuring MicroBlaze soft processor cores and new development kit bundles
• Virtex-4 FX APU co-processor technology to accelerate embedded applications
• Development kits and intelligent tools to accelerate embedded design, including the award-winning Platform Studio Tool Suite and ChipScope Pro debugger

ESC Technical Paper Presentations

ESC-416: Thursday, 9/15, 10:30 a.m.
FPGA Design for Firmware Engineers, Part 1 – Avnet

ESC-426: Thursday, 9/15, 1:00 p.m.
FPGA Design for Firmware Engineers, Part 2 – Avnet

ESC-406: Thursday, 9/15, 8:30 a.m.
FPGA Embedded Processors: Revealing True System Performance – Memec

For more information about ESC Boston, visit the conference Web site at: http://www.esconline.com/boston

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Editorial contact:

Laurie Stanley

Xilinx Public Relations

(408) 879-5292

laurie.stanley@xilinx.com