With verified interoperability between specialty ASSPs and Xilinx Virtex-II series FPGAs, you can focus on designing and debugging your system rather than how to make all the parts work together.

Virtex™-II series Platform FPGAs include a rich set of system features such as embedded memories, DSP, and I/O connectivity with which you will design most blocks of your system. But your design might need to incorporate specialty ASSPs. These could be large memories, optical transceivers, analog filters, A/D and D/A converters, specialized DSP/network processors, connectors, and many others. Interoperability of all these devices on the printed circuit board (PCB) is a tough challenge.

Xilinx Virtex-II Pro™ and Virtex-II FPGAs solve these challenges by enabling you to connect to almost any ASSP without a hitch. This article will show you how.

Interoperability Can Make or Break Your Design

Making multiple disparate devices compatible – often from different vendors – can be an arduous task involving numerous design and debug iterations. Even if you do succeed in making all the devices work together, the inefficiency of such a design is likely to impose a performance penalty that prevents the overall design from achieving its maximum performance objectives. Unknown interoperability of devices increases the risk of cost overruns and slipped schedules, and can even jeopardize design completion. Starting with a Platform FPGA that delivers interoperability of the devices you will use in your design is critical to predicting project time, cost, and feasibility.

Xilinx Leads in Interoperability

Xilinx offers complete interoperability solutions with leading ASSPs across a broad range of interface standards. This ensures that the integration of third-party ASSPs will go smoothly, that the cost of design implementation will be predictable, and that your projects will succeed the first time through.

By choosing Virtex-II Platform FPGAs over alternatives that lack powerful capabilities for interoperability, you will lower the risk of slipped deadlines, significantly lower the cost of the project, accelerate design and development cycles, and simplify the expensive system debug process.

With its extensive network of partnerships with ASSP vendors through the Reference Design Alliance Program – the only such program in the programmable logic industry – Xilinx gives you the edge. Xilinx and ASSP vendors work closely to deliver fully interoperable solutions. This allows you to simplify system development and eliminates the tough challenges of making all the different devices on the board work together seamlessly. You can focus your creative energy on product differentiation and maximizing system performance.

Virtex-II Pro Delivers Proven Interoperability

With proven RocketIO™ serial and SelectIO™-Ultra parallel I/Os in Virtex-II Pro Platform FPGAs and IP cores for protocols, the Xilinx SystemIO solution provides ultimate connectivity with ASSPs. The Virtex-II Pro FPGA family was built on the Virtex-II family in a completely scalable framework – specifically to address interoperability and prevent problems common with ground-up competing architectures. Virtex-II Pro FPGAs inherit the entire Virtex-II SelectIO-Ultra technology, which directly addresses connectivity and interoperability with ASSPs using established parallel system interfaces. Virtex-II FPGAs have been widely used as an interface to bridge disparate ASSPs. Given that ASSP vendors have been working with SelectIO-Ultra technology for more than two years, Virtex-II Pro FPGAs give you unparalleled edge in interoperability over any competing FPGA in the world.

Virtex-II Pro devices support dozens of emerging, established, and even proprietary connectivity standards. The embedded RocketIO serial transceivers enable the widest range of programmable serial bandwidth: 622 Mbps to 75 Gbps covering emerging serial standards such as Gigabit Ethernet, 10 Gigabit Ethernet XAUI, PCI Express™, SxI-5, TFI-5, Serial RapidIO™, InfiniBand™, and Fibre Channel.

SelectIO-Ultra parallel I/O system interfaces support such standards such as SPI3 (POS PHY 3), SPI-4.1 (Flexbus 4), SPI4.2 (POS PHY 4), XGMII, RapidIO, PCI, PCI-X, CSIX, HyperTransport™, XSBI, and SFI-4 using 22 single-ended and six differential electric standards including LVTTL, LVCMOS, PCI, PCI-X, HSTL, SSTL, LVDS, LVPECL, and HyperTransport.

Checking silicon features and electri-cal I/O standard support is only the first step towards interoperability with ASSPs. Xilinx goes far beyond this by providing pre-verified interface and controller IP cores – jointly verified in hardware with ASSP vendors during several months of engineering testing to guarantee full interoperability. Reference designs and boards are also available to demonstrate true hardware interoperability, as shown in Figures 1, 2, and 3.

The list of ASSP devices interoperable with Virtex-II series FPGAs is shown in Table 1. The latest list of interoperable devices, along with reference designs, is always available at www.xilinx.com/company/reference_design/interop_solutions.htm. These ASSPs include devices from Intel, AMCC, PMC-Sierra, Mindspeed Technologies, IDT, and other vendors.

Table 1 - Virtex-II series interoperable solutions

In addition, Xilinx actively participates in interoperability events and testing activities. Recently, Xilinx submitted Virtex-II Pro FPGAs for interoperability testing to the 10 Gigabit Ethernet Consortium at the University of New Hampshire’s InterOperability Lab, which was attended by 13 participating vendors. (ftp://public.iol.unh.edu/pub/10gec/Oct02_GTP_release.pdf).

Xilinx Lets You Choose the Best ASSPs

The Virtex-II Pro solution permits you to design-in the best ASSPs that fit your needs. ASSPs come with varying and often incompatible interface standards. Lack of extensive interoperability capabilities can limit design alternatives. For example, choosing a network processor ASSP supporting the HyperTransport standard could prevent you from choosing a security co-processor ASSP supporting only the RapidIO standard. Even if these two ASSPs matched your requirements perfectly, you may still be forced to choose less suitable ASSPs just because they work together.

With the Virtex-II Pro FPGAs’ support for multiple system connectivity standards and proven ASSP interoperability, you can effortlessly bridge standards and ASSPs. Select the right ASSPs that best fit your product needs based on capability and price, not on how well they work together. The Xilinx leadership in interoperability gives you the clear advantage in differentiating your products from the competition.

Conclusion

Interoperability of disparate devices on the board is a critical parameter for design success. Your design productivity, performance, and even the probability of completion can be significantly improved by thoroughly verified interoperability among semiconductor devices and vendors. Xilinx and the leading ASSP vendors want you to be confident that you are in safe hands when working with their devices.

Start your next design on a robust platform that has a proven record of several years of diverse interoperability to its credit. Focus your creative energy on product function, performance, and differentiation, rather than worrying about whether the components will work together.

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