Building on a tradition of cost-effective speed and reliability, two new Xilinx Spartan-IIE devices offer enhanced flexibility and higher densities – at the lowest cost per I/O.

With today’s challenging economic times, making cost-sensitive products such as plasma displays, set-top boxes, and broadcast video equipment requires a low-cost solution. Additionally, the integration of more features in digital consumer products often demands more pins than previously available. Thus, we were challenged to create a low-cost solution that addressed the need for a high pin count device. Two new additions to the successful Spartan™-IIE family of devices meet these exacting criteria. The two devices, XC2S400E and XC2S600E, are low-cost, high-density, high-I/O devices that will allow you to target a wider spectrum of designs than you previously could with programmable logic.

Fourth Generation Spartan FPGAs

Since introducing the Spartan series more than four years ago, Xilinx has delivered four generations and shipped more than 40 million Spartan series FPGAs, with prices starting as low as $2.55 per device. With the Spartan series, you get the advantages of high I/O-count ASICs and gate arrays – and you get the added flexibility of a general purpose, programmable architecture. You also get the benefit of a proven architecture with the industry’s fastest and most productive software tools, plus the most comprehensive offering of IP cores from Xilinx and third-party AllianceCORE™ vendors.

On November 18, 2002, Xilinx announced an extension to the Spartan product line to address customer demand for even higher density and higher I/O-count devices in the price ranges required for consumer applications. As shown in Table 1, the XC2S400E device (400,000 system gates and up to 410 I/Os) and the XC2S600E device (600,000 system gates and up to 514 I/Os) give you the ability to integrate more functionality into a smaller form factor and still meet your stringent budget requirements. With the Spartan-IIE family, you get:

• The lowest cost per I/O – The new Spartan-IIE devices give you more I/Os at much lower prices than any competing FPGA.
• Up to 514 I/Os – With the highest number of I/Os available in the low-cost segment of the FPGA industry, Spartan-IIE devices allow you to put higher density ASIC designs into FPGAs and still keep the benefits of reprogrammability.
• Four DLLs – The DLLs allow easy clock duplication, quick frequency adjustment, faster state machines using different clock phases, de-skewing of the incoming clock, and generation of fast setup and hold times or fast clock to outs.
• More than one billion MACs/sec per dollar – You can implement high-performance DSP functionality at the lowest cost possible.

Table 1 - Spartan-IIE product matrix

More I/Os for Digital Consumer Applications

Moving to advanced technologies has always enabled Xilinx to dramatically reduce costs and simultaneously bring larger density devices within the reach of many more cost-conscious customers. Now, with the two new Spartan-IIE FPGAs, this same advantage is being brought into the I/O arena.

Traditionally, consumer applications with more than 305 I/Os have required ASICs, as shown in Figure 1. But with the introduction of the XC2S400E and XC2S600E devices, you now have up to 410 and 514 I/Os, respectively, and with the added advantage of reprogrammability. These two new FPGAs deliver a greater than 67% increase in I/O capacity over previous Spartan-IIE offerings, and up to 100% more I/Os than competing FPGAs in the same density ranges. Additionally, the I/Os can be configured as differential I/O pairs (up to 205), giving you LVDS performance up to 400 Mbps.

> Supporting More I/O Standards
Today’s designs are more complicated than ever, with the majority typically containing numerous I/O standards on a single PCB. With the Spartan-IIE FPGAs you can connect as many as 19 different I/O standards on a single chip. This flexibility gives you the ability to bridge different I/O standards and protocols – and completely eliminates the need for costly bus transceivers.

Scaleable Footprints
Following the tradition of Xilinx FPGA families, the Spartan-IIE family continues to support density migration across common packages without changing the PC board footprint. The relative positions of VCC and GND remain constant across like packages, unlike competing low-cost FPGAs.

For example, when using a FG456 package, six density members of the Spartan-IIE family can be interchanged, providing outstanding flexibility for design revision, upgrade, or cost optimization, as shown in Table 2.

Table 2 - Density migration possibilities

More RAM

The new Spartan-IIE devices differentiate themselves in the amount of available memory both in block RAM and distributed RAM.

The XC2S400 has four columns and the XC2S600E has six columns of block RAM, equating to 160K and 288K of block RAM, respectively. This is a greater than 4X increase in capacity over the previous largest density Spartan-IIE device. With this increase comes the possibility of storing more data, coefficients, FIFO functions, and larger general memory functions in your memory-hungry applications.

Xilinx continues to be the only FPGA supplier to offer distributed RAM, which is an ideal solution for designs that require multiple small, fast, and flexible memories situated close to the logic. As with all other Xilinx FPGA families, the 4-input LUT in Spartan-IIE devices can also be used as memory, where it can be configured as ROM, or single-port or dual-port synchronous RAM.

We’ve doubled the amount of distributed RAM in these new devices to 150K for the XC2S400E, and 216K for the XC2S600E.

Software and IP

The entire Spartan-IIE family is supported by the Xilinx ISE (Integrated Software Environment) tool set, which includes the industry’s most advanced timing-driven implementation tools available for programmable logic design, along with design entry, synthesis, and verification capabilities (www.xilinx.com/ise5/).

There are also more than 200 IP cores, including PCI, DSP, and other pre-designed and tested solutions (www.xilinx.com/ipcenter/) to get your designs up and running fast.

Processing Solutions on a Budget
By utilizing the Xilinx MicroBlaze™ 32-bit field programmable controller option with the Spartan series devices, you can create an easy-to-use, low-cost, customized processing solution. The MicroBlaze processor is the fastest, most powerful soft processor and peripheral solution on the market today for traditional 16-bit and 32-bit microprocessor and microcontroller applications.

Coupling the ISE and MicroBlaze solutions gives you a winning combination with the benefits of:

• Flexibility – Easily create a customized processor design that can be modified at any time during the design cycle.
• Guaranteed product availability – You can purchase the MicroBlaze source code and never have to worry about processor obsolescence.
• Reduce system cost – By integrating your entire processing solution within one device you not only save time and effort but you also reduce your bill of materials, inventory, and debug time.

Conclusion

To be successful in this tough, competitive marketplace, you need an inexpensive and flexible design solution. You also need fast, reliable performance and the lowest cost per I/O. With the expanded Spartan-IIE family there is no faster, safer, or lower cost way to develop next-generation consumer products.

To obtain a free Spartan-IIE Resource CD containing a wealth of information on the XC2S400E and XC2S600E Spartan-IIE devices, visit www.xilinx.com/spartan2e.

Printable PDF version of this article.  (02/15/03) 160 KB