Support|documentation
 
 
Home : Publications : Xcell Journal Online : Articles by Date : Article

Xcell Journal Online Article
   
     
   
   
   
 
  Xcell Home
  Articles by Date
   
  Subscription
  Comments & Suggestions
  Write Articles for Xcell
   
   
   
   
 
Working with the Best
by Wim Roelandts, CEO, Xilinx, Inc.

Xilinx now ranks number four on FORTUNE magazine’s list of the “100 Best Companies to Work For.” Here’s why it matters to you.

Xilinx is a certainly great company to work for, as acknowledged by FORTUNE magazine’s ranking, and we are a great company to work with, because we have not slowed our fast pace of innovation nor decreased our customer support activities – all critical to the success of our customers. We weathered the recent economic downturn in ways that have made Xilinx stronger across the board. How did we keep our technology advancing at a high rate, continue to expand our support, and gain market share, in a downward spiraling economy? Here’s how.

A large part of our business came from the telecommunications industry, which was severely hit by the downturn. Our revenues were cut almost in half, overnight. Our competitors were affected just as severely and as a result, many were forced to lay off a sizeable part of their workforce and to reduce both their product development and their customer support activities. We chose to make layoffs only as a last resort, and yet we needed to cut our expenses dramatically.

We chose to take pay cuts, on a sliding scale, instead of doing layoffs. The average pay cut was 6%, rising to 20% for myself. Everyone shared the burden according to their ability, and everyone was very happy to have some job security in a time when many of our colleagues in other companies were losing their jobs. Not only did our morale remain high, but our productivity increased as well, and we continued to produce our new technologies even faster than before.

Studies have shown that companies that can avoid layoffs rebound more quickly when the economy turns around, because they can take advantage of every new opportunity with a full staff. Companies that must layoff their workers suffer from lower morale, less productivity, and a slower return to profitability. That’s what we are seeing now: Xilinx is gaining market share, while our competitors are struggling to keep up.

What We’ve Accomplished

The technology development that we are doing today will not show up in your hands for several years. That’s why it is imperative that we keep our technology advancing, even when current revenues are slumping. Otherwise, we would find that when the economy turns around, we would not be ready to support your demand. Here are some of the important advances we are now introducing.

90 nm Low-Cost Fabrication Technology
Using IBM’s most advanced, copper-based, 90 nm semiconductor manufacturing process technology, IBM and Xilinx are manufacturing a new FPGA design in IBM’s new 300 mm chip fabrication facility. This technology is a major reason why our FPGAs will continue to lead the industry in cost reduction.

This new process technology has resulted in a 5% to 80% percent chip-size reduction compared to any competing FPGA. IBM plans to manufacture this new product, in high volumes, in the second half of 2003. The new IBM $2.5 billion, 300 mm chip-making facility combines – for the first time anywhere – IBM chip-making break-throughs such as copper interconnects, silicon-on-insulator (SOI), and low-k dielectric insulation on 300 mm wafers.

Our investment in 90 nm manufacturing technology will enable us to drive pricing down to under $25 for a one-million-gate FPGA, which represents a savings of 35% to 70% compared to any competitive offering. Such a significant reduction in pricing is possible due to the remarkable economies of scale involved with moving to next-generation manufacturing processes at increasingly finer geometries. Now we can achieve greater device densities and higher yields, making our FPGAs the logical alternative to ASICs.

The rising costs of developing ASICs on more advanced processes are well known. Not only are non-recurring engineering (NREs) charges rising to over one million dollars per design, but the engineering cost of developing and testing a complex ASIC on advanced processes such as 150 nm or 130 nm technology can run up to 10 times that amount. With the deployment of our new FPGAs on 90 nm technology, Xilinx has resolved all of the deep sub-micron design challenges for you. Using these new FPGAs, you will get all of the substantial cost advantages of the 90 nm technology without being forced to worry about the detailed circuit design issues associated with ASICs. You can concentrate on getting your system designed rather than on getting the chip itself to function. With our increased density, performance, and system features, you get all the benefits of an ASIC in a flexible, programmable FPGA, without the risk and the huge NRE costs. This is dramatically expanding the total market for FPGAs, both in new applications in existing markets and in totally new markets.

Serial Tsunami
We have pioneered the development of very high-speed serial I/O technology – we call it the Serial Tsunami Initiative. This new technology will solve many design challenges, allowing you to replace old parallel busses with a far less expensive solution. With Serial Tsunami, you can significantly reduce costs, produce faster designs, reduce your PC board area, and create products that were never possible before.

Other advantages of Serial Tsunami include reduced EMI, noise, cross talk, and skew, which makes your overall design more reliable. You can easily expand the I/O for increased bandwidth, and the physical interface can drive long signal traces on your PC boards, making them ideal for backplanes. The move to serial I/O technology is inevitable – there is no better way of cutting costs while keeping pace with current and future bandwidth requirements. Our Virtex-II Pro™ FPGAs with embedded RocketIO™ 3.125 Gbps transceivers, and the accompanying IP cores, reference designs, and support infrastructure, provide the best possible way for you to realize all the advantages of serial I/O technology without the pitfalls.

Virtex-II Pro FPGAs support major emerging serial interfaces such as PCI Express™, Gb Ethernet PHY, 10 Gb Ethernet XAUI, Fibre Channel, OC-48, OC-192 and OC-768 SONET for backplanes, Serial RapidIO™, and InfiniBand™. Each embedded RocketIO transceiver in the Virtex-II Pro FPGAs is based on several generations of customer-proven Mindspeed SkyRail™ technology and can run from 622 Mbps to 3.125 Gbps; there are up to 24 of these transceivers available in one FPGA.

Virtex-II Pro FPGAs also support parallel interface standards such as SPI-3 (POS PHY Level 3), SPI-4.1 (Flexbus 4), SPI-4.2 (POS PHY™ Level 4), 10 Gb Ethernet Media Independent Interface (XGMII), RapidIO, PCI, PCI-X, CSIX, HyperTransport™, XSBI, and SFI-4. Therefore, Virtex-II Pro FPGAs are the only devices in production today that enable you to bridge between the parallel and serial interfaces, making them the ultimate connectivity platform.

Xilinx and partners are delivering pre-engineered IP cores for serial connectivity protocols. Cores for Gb Ethernet MAC with PHY, 10 Gb Ethernet MAC with XAUI, PCI Express, Fibre Channel, and reference designs for SONET OC-48 backplanes are available now, and more are being added. You can also build higher-level protocols using our embedded IBM PowerPC™ processors. Reference designs and evaluation/prototype boards help you verify the performance of the transceivers in real hardware.

Creating designs with speeds of 622 MHz, 3.125 GHz, 10 GHz, and beyond will present challenges with PCB design and signal integrity. Therefore, Xilinx and leading EDA partners are solving this dilemma with tools such as the Cadence SPECCTRAQuest™ and HSPICE models. We provide in-depth characterization data for the RocketIO transceivers for flawless system design. You will know exactly what to expect for your specific design situation, plus we provide best design practices and PCB layout guidelines to help you succeed.

We have also developed a new, open, scalable, lightweight serial standard called Aurora to help you transition from parallel to serial interfaces. It is a link layer protocol that can encapsulate and transport any higher-level protocol. It is very resource-efficient with low latency. A single-lane reference design and the specification are available for free download at www.xilinx.com/aurora/. A quadlink reference design will be available during the first half of 2003.

And Much More

I’ve only mentioned a few of our most important technologies. As you can see, the current downturn has not slowed our innovation, and we are fully ready to support your design requirements, both now and in the future. We are the fourth best company to work for, and the number one company to work with.

Printable PDF version of this article. PDF logo (02/10/03) 205 KB

 
/csi/footer.htm