A next-generation, mixed-domain SPICE tool with directly integrated S-parameter data capability provides the most accurate simulation of combined silicon and system behavior.

Streamlining the simulation of entire complex system environments – from chip, to package, to board, to connector, to backplane, and back again to chip – has become one of the most urgent needs of designers today. The problem becomes even more challenging because the supply chain for multi-gigabit serial I/O connectivity requires tighter integration among many different parties: chip and board designers, system integrators, and backplane and connector suppliers.

Internet applications for data, audio, video, and graphics have spawned a myriad of competing standards to relieve the serial I/O bottleneck, including 10 Gigabit XAUI, InfiniBand™ and PCI Express™. The only effective way to address the design, simulation, and integration of multi-gigabit serial I/Os on multiport networks is to bridge the circuit simulation gap between chips and systems. NSPICE, a next-generation SPICE (Simulation Program with Integrated Circuit Emphasis) tool developed by Apache, co-simulates nonlinear SPICE models for the transmitter and receiver circuitry. Together with linear scattering parameters (S-parameters) for connectors and backplanes, NSPICE bridges the simulation for chip-to-chip and other complex topologies.

Limitations of S-Parameter Lumped RLC

At high frequencies, the S-parameter is the most accurate form of broadband frequency representation for such off-chip, passive networks as packages, boards, and backplanes. S-parameters are preferred over other frequency domain parameters (Y and Z, for example) primarily because S-parameters range between the values of 0 and 1, and they are well behaved across a broad frequency range. In addition, S-parameters are the easiest parameters to measure using a vector network analyzer. By matching the signal impedance without reflection and saving the results to a standard file, you can directly access S-parameter data for simulation.

However, most existing SPICE tools still require you to model S-parameter data from backplanes, boards, and transmission lines into lumped RLC (resistance, inductance, and capacitance) “black box” models, or SPICE subcircuits. This timeworn lumped RLC approach is necessitated by the inability of existing time-domain SPICE tools to take in the frequency-domain S-parameter data directly.

There are two main problems with this approach. First, lumped models do not accurately represent distributed frequency-dependent effects, particularly in the high frequency range. Second, the model generation process can result in a massive quantity of elements, taxing both you and the SPICE tool.

To illustrate the modeling complexity, let’s examine a simple two-port passive linear network that has four S-parameters: reflection at both ports, as well as forward and backward transmission. Correspondingly, a four-port network contains 16 S-parameters. A passive structure such as an FR-4 backplane can possess hundreds of poles/zeros across a broad frequency range. Using the lumped approach, you must generate models by fitting and optimizing each pole/zero combination from S-parameter data. This process can result in hundreds of thousands of elements in large multiport networks. The lumped model development time alone can take up to several weeks, not counting the SPICE simulation time and resulting convergence issues. And at the end of this prolonged process, it is likely that the system will be inaccurate and restricted to a limited frequency range because the poles/zeroes will have to be reduced and approximated.

Benefits of S-Parameter Integrated NSPICE

As shown in Figure 1, integrating S-parameter data directly into a mixed-domain, high-capacity SPICE tool offers a faster and more accurate alternative to lumped approaches. NSPICE is fully compatible with HSPICE (an analog circuit simulator marketed by Synopsys). It performs mixed-domain simulation with direct S-parameter data, generating accurate eye diagram patterns and output waveforms. NSPICE co-simulates the nonlinear SPICE models for the transmitter and receiver circuitry together with linear S-parameters for connectors and backplanes, thereby bridging the simulation for chip-to-chip and other complex topologies.

Figure 2 depicts a typical application: a 3.125 Gbps SERDES system consisting of a transmitter with PLLs (phase locked loops, represented by a SPICE netlist), connectors, backplanes, linecards (represented with S-parameter models), cables (represented with transmission-line models), and a receiver (represented by a SPICE netlist). The entire system requires simulating more than 10,000 devices, on top of hundreds of thousands of RLC parasitics.

As shown in Figure 3, the total turn time using NSPICE, from reading in S-parameters to generating eye diagrams, is at least 10 times faster than lumped model generation and simulation approaches, which can consume several weeks. For smaller circuits that are less than a few thousand elements, the turn time in NSPICE for an eye diagram can be shrunk down to only a few minutes.

Until recently, some connector, backplane, and board suppliers provided only fitted lumped models to their customers, because that was the only way to simulate the effects in SPICE. Unfortunately, accuracy has already been lost in the fitting process, so customers are now requesting vendors to provide the S-parameter data directly. NSPICE can simulate the system using whatever models are available for each component, in any combination of lumped models, transmission models, and S-parameters.

NSPICE is written in C++ and employs hierarchical algorithms offering improved performance, memory efficiency, and better convergence using advanced matrix solver technology. The product is fully compatible with HSPICE and SPICE models and netlists. NSPICE also supports pseudo-random bit stream (PRBS) generation and eye diagrams.

Working with NSPICE
To illustrate the typical usage of NSPICE, assume that a channel simulation configuration has the following components: encrypted models from the IP vendor for the transmitter and receiver, S-parameter models for the backplane, and lumped models for the connectors and packages from the manufacturer. After constructing a SPICE netlist that represents your channel configuration, you can run transient time-domain simulation on the entire system using NSPICE – without translating the S-parameter models – and generate eye diagrams directly from the simulation results. In addition, NSPICE supports advanced analysis, such as frequency modulation, to simulate the on-chip PLL response together with off-chip resonance effects, thereby enhancing the accuracy of the PLL simulation.

The Xilinx flagship Virtex™-II Platform FPGA demands simulation that accu-rately correlates the RocketIO™ serial transceiver behavior and performance with actual silicon. By modeling serial backplane, chip-to-chip, and other topologies with direct S-parameter data, NSPICE provides the most accurate simulation of silicon behavior.

Conclusion

Adapting to the ever-increasing demands of networking bandwidth requires the use of technology that seamlessly bridges the time-domain and frequency-domain aspects of large systems. A true, mixed-domain SPICE, integrated with actual S-parameter data, benefits the entire supply chain for multi-gigabit serial connectivity by providing the most accurate prediction of silicon and system behavior. Predicting behavior accurately ensures significant system cost savings, easier integration, and, most important, accurate and consistent operation across a broadband frequency range.

To learn more about NSPICE, visit www.apache-da.com or contact info@apache-da.com.

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