Xilinx Global Services provides you with the skills, courses, and information needed to meet the design challenges of FPGA programmable systems that interface embedded processors with multi-gigabit serial transceivers.

With the tremendous increase in connectivity bandwidth requirements, our industry is experiencing a rapid move away from parallel interface architectures toward high-speed multi-gigabit serial standards.

Serial interfaces will ultimately be deployed in nearly every electronic product imaginable – including chip-to-chip interfacing, backplane connectivity, system boards, and box-to-box communications. Serial interfaces reduce system costs, simplify system design, and provide scalability to meet new bandwidth requirements. These emerging technologies sometimes require special knowledge in order to create high-speed serial I/O solutions – skills and experience that may be new to traditional programmable logic designers.

Service organizations play an increasingly important role in providing the knowledge about programmable systems needed to solve high-performance architectural challenges.

To ensure the success of design teams, while keeping overall cost down, Xilinx Global Services offers a complete portfolio of services for the Virtex-II Pro™ FPGA family. Xilinx Education Services, Xilinx Design Services (XDS), and support. xilinx.com all provide the experience and skills to help you successfully develop high-speed serial solutions and embedded systems, as well as FPGA logic design.

Designing with RocketIO Transceivers

High-speed serial I/O channels can replace parallel buses in many systems and will result in lower overall costs – if designed correctly. These channels can significantly reduce board space and simplify board design while freeing I/O resources for other applications. To teach you how to create these high-speed serial designs efficiently, Xilinx provides training designed to reduce significantly the rigors of getting up to speed on this new technology.

Designing with RocketIO Multi-Gigabit Transceivers is a two-day course that teaches how to fully utilize RocketIO™ transceivers in Xilinx Virtex-II Pro FPGAs. By mastering the details of high-speed serial designs, you learn to develop fast and efficient serial interfaces that will operate flawlessly. In addition to classroom instruction, more than half of this class is taught in the lab, where you learn how to efficiently synthesize, implement, and debug designs.

Designing with RocketIO Multi-Gigabit Transceivers teaches you the skills necessary to:

• Fully utilize the ports and attributes of RocketIO transceivers
• Effectively use advanced RocketIO features such as CRC, channel bonding, clock correction, comma detection, 8b/10b encoding, programmable termination, and pre-emphasis
• Use the Architecture Wizard to instantiate RocketIO primitives in designs
• Achieve compatibility with high-speed I/O standards using RocketIO
• Recognize and understand the data streams of popular communications standards such as Gigabit Ethernet and PCI Express.

Designers who work with Virtex-II Pro FPGAs need to know with certainty that the RocketIO multi-gigabit transceivers (MGTs) will perform according to their specific requirements. To allow the measurement design parameters such as bit-error rate, latency, and resynchronization time, and physical-layer characterization involves the building and reuse of embedded hardware and software systems on Virtex-II Pro FPGAs. XDS has experience with and access to various Xilinx characterization boards to carry out such measurements.

Experience with partial reconfiguration of RocketIO MGTs is also important when you’re designing Virtex-II Pro FPGAs. For example, electrical transmission characteristics commonly vary from serial link to serial link depending on the distance of the link. Partial reconfiguration offers you a way to avoid storing multiple bitstreams on a system, allowing each system’s RocketIO configuration to be personalized using either on-board switches or software control. Partial reconfiguration can also be used to switch a RocketIO channel from one physical standard to another without any service disruption on the unaffected channels.

In addition to providing partial reconfiguration under software control, XDS has embedded software expertise to help you deliver fully integrated and dynamically configurable systems. XDS can help you develop the high-level communications protocol for FPGA programmable logic and embedded software.

Web-Based Tech Tips

A comprehensive support resource is essential to fast design cycles and first-time success for a new serial I/O design. Available 24/7, support.xilinx.com has online information on the latest down-loads, techXclusives, and other recent support-related news. MySupport.xilinx.com can be personalized so that you see only the information related to the devices that you use, such as data sheet updates for Virtex-II Pro FPGAs.

Tech Tips for RocketIO is a new support tool that includes information such as:

• RocketIO FAQ
• Documentation about RocketIO
• Top Answers for RocketIO.

Before you start your next high-speed serial design, save yourself time and effort by taking advantage of the skills and experience offered by Xilinx Global Services. Learn more about the services available for RocketIO MGTs at: www.support.xilinx.com/support/gsd.

The course description for Designing with RocketIO MGTs is available at: www.support.xilinx.com/support/training/abstracts/rocketio.htm.

For information about the serial I/O expertise of Xilinx Design Services, see: www.support.xilinx.com/xds.

RocketIO Tech Tips are available on support.xilinx.com at: www.support.xilinx.com/xlnx/xil_tt_home.jsp.

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