Designing a state-of-the-art airborne imaging system requires massive parallel processing, high-speed I/Os, and heavy-duty signal processing. Boeing’s design team found all three plus configurability in the Virtex-II Pro Platform FPGA.

Over the past 10 years, the aerospace industry has adopted the use of commercial off-the-shelf (COTS) electronics in favor of developing custom systems. This change has been fueled in part by the high development costs associated with ASICs or specialized software processors.

As a result, commercial suppliers seeking the best available technology have focused on the design and fabrication of multi-processor hardware. Today, many of these systems feature DSP devices or RISC-based CPUs. Although Boeing has successfully integrated these solutions into many systems, the application of COTS to high-end signal- and image-processing designs has remained very challenging.

Even "high-end" DSP and RISC architectures offer limited parallelism, memory flexibility, interface capability, and determinism. The integration of dozens of processors in a hard real-time architecture is non-trivial. The complications of packaging, weight, volume, thermal management, and power con-sumption to system design are obvious. The challenges often appear to grow exponentially with the number of processors required to solve the problem. The advent of Virtex-II Pro™ Platform FPGAs and the promise of more advanced, future Platform FPGAs are completely changing the game of programmable system design.

Airborne Imaging
Boeing is designing a state-of-the-art airborne, electro-optical imaging system. The end product will provide exceptional surveillance and engagement capability for aircraft in the 21st century. To achieve these objectives, Boeing designers are integrating a broad array of technologies into a complete programmable system. Key design elements include:

• A high-resolution gimbaled telescope is driven by line-of-sight control electronics. This system implements control algorithms that accept operator inputs to point the telescope to ground-based objects of interest.
• Precision optics direct the light collected by the telescope into a series of imaging cameras. Aircraft engine vibration, structural resonance, and other disturbances can wreak havoc on the alignment of these devices. To compensate for these effects, an automatic alignment system is incorporated. The goal is to stabilize the imaging system so it can yield a clear, jitter-free image for the system operators.
• Sensitive imaging cameras act as the "eyes" of the electro-optical payload. These devices provide high-resolution daytime and nighttime video to real-time image processing hardware.
• Sophisticated image-processing algorithms that perform video enhancement, segmentation, and feature extraction. Together, these subsystems allow an operator to identify and interrogate ground-based objects with unprecedented capability. Figure 1 highlights some of the essential functions of this system.

Boeing Subsystems
Boeing has chosen the Virtex-II Pro Platform as a critical element in this programmable system. The FPGA device and the supporting chips connected to it execute the following functions:

• High-speed image processing
• Digital-video scene generation and storage
• Fiber-optic media conversion of video data
• DVI display generation
• NTSC video generation
• Servo-control functions
• High-bandwidth data transfer interfaces.

Embedded DSP
One reason Boeing chose the Virtex-II Pro platform is that it incorporates three of the most important elements for a modern, embedded DSP device.

1. A high-performance, high-density, programmable logic fabric – this capability is the heart and soul of true parallel processing. FPGA technology lends itself very well to the repetitive, systolic nature of our algorithms. Embedded multipliers, SRL16 capabilities, true dual-port Block RAM, and a segmented routing architecture give us key enabling technologies to produce powerful designs.
2. A wealth of interface pins that can be configured for different signaling standards and easily integrated with devices from other vendors – using a single Xilinx chip, Boeing’s design team can arrange a device with a PCI bus interface, video encoder/decoder connections, digital-video display outputs, multiple SRAM interfaces, and a high-speed digital-video input port. These functions run in parallel, concurrently, without the hassles of bus contention and multi-processor scatter/gather issues. The Virtex-II Pro multi-gigabit transceivers (MGTs) raise the bar to anoth-er level. MGTs are extremely useful for the imaging camera interfaces. Boeing’s design team can use a low-end Virtex-II Pro device to serialize several parallel digital video outputs. These serial outputs are easily converted to fiber-optic media. And because the data transfer is point-to-point, designers can program the serial transceivers with a user-friendly data protocol.
3. An embedded IBM PowerPC™ 405 CPU – the point of using an FPGA in many image-processing applications is to unburden the host CPU from simple, brute-force calculations. With the embedded PowerPC CPU, the host is left unimpeded to handle the complex decision-making logic that forms the brains of a system.

PowerPC Advantages
Many people might argue that it’s easy enough to hook an FPGA to a PCI bus interface – so why bother with the embedded PowerPC CPU in the Virtex-II Pro platform? For some applications, a PCI interface is sufficient, but Boeing’s design team has found many compelling reasons to choose an embedded CPU:

• By using logic to accelerate the embedded CPU, most of the residual back-end processing for our applications requires only a modest amount of compute power. We all like having multi-GHz CPU power, but it is not always necessary.
• The embedded PowerPC CPU con-sumes a fraction of the power of a high-end CPU, while remaining directly coupled to the logic fabric. In Boeing’s business, it seems that Moore’s law does not always apply. RISC CPUs for embedded applications have not generally kept pace with desktop systems in terms of clock speed and performance. Packaging and thermal dissipation constraints make it very hard for embedded hardware developers to offer multi-GHz-class processor subsystems in a small form factor. DSP processors address many power consumption issues, but lack the logic interface flexibility. For many applications, the embedded PowerPC provides the right balance of performance, power, interface, and general-purpose computing capability.
• Those who think PCI is easy should try using the CoreConnect™ bus with dual-port RAMs. In a matter of minutes, you can configure an FPGA interface to a 405 processor via high-speed BRAM. It’s like having your data put right into the cache RAM. Now consider that multiple, independent FPGA processes can stuff these RAMs in parallel – and with completely different clocks than those used by the PowerPC CPU. You get high-bandwidth, extremely simple data transfer without the vices or overhead of PCI. Put simply, there is far more room for creative interfaces, application-specific tailoring, and flexibility in the Virtex-II Pro platform.
• Consider your application model for your microprocessor. Boeing’s design team gets plenty of mileage out of using the embedded CPU as a "microcontroller." If you dispose of a full-blown operating system and run the PowerPC CPU with a lightweight kernel, the internal Block RAM can hold a significant amount of user code. Even better, the FPGA is now both hardware and software reconfigurable – in real time. A single unified bitstream defines the operating characteristics for both the CPU and logic.

• The embedded multipliers are very useful for DSP-based algorithms. They provide high silicon efficiency and effortlessly support the clock rates our designs require.
• The dual-port Block RAM is a veritable Swiss Army knife in terms of functionality. It can be used for tapped delay lines, command and status data buffers, lookup tables, bus-width conversion, FIFOs, and so forth.
• The SRL16 capability with dedicated fast-carry logic gives the Virtex-II Pro platform a key advantage in DSP applications. Both features are critical to the design of high-performance digital filters and the SRL16 mode helps to significantly reduce the logic footprint of DSP algorithms.
• DCI (digitally controlled impedance) technology is a significant aid when implementing functions such as DDR RAM interfaces. Boeing’s PCB designer no longer struggles with finding a way to place hundreds of termination resistors.
• The DCMs (digital clock managers) provide an easy-to-use, flexible clock management scheme. Our design team has leveraged both the frequency synthesis and precision phase shifting capabilities in many designs. The new ISE architecture wizards make instantiating them easy.
• The MGTs allow us to create high-bandwidth interfaces to a high-speed serial link that operates as if it were a parallel data bus. Ninety-five percent of the design problems in this application are simply about sending pixel data from A to B. Rapid IO, 3GIO, InfiniBand, or Fibre Channel are generally overkill for this type of data transfer requirement. The MGTs provide serial interfaces in a way that has reduced board size tremendously. The 8b/10b and SerDes (serializer/deserializer) chips that we used in a prior design were actually bigger than an entire Virtex-II Pro device.

Figure 2 shows how the Virtex-II Pro platform enabled Boeing’s design team to dramatically reduce system size and cost.

Boeing’s high-performance imaging system is taking advantage of the complete Xilinx solution. We are using most of the features in the silicon as well as Xilinx handcrafted IP cores, System Generator for DSP, and CORE Generator™ tools. These tools enable us to focus on the specific elements of the design and spend less time constructing the architecture that surrounds it.

Conclusion
Virtex-II Pro Platform FPGAs raise the bar of both capability and complexity for programmable system design. Boeing’s design team chose Xilinx solutions because the Virtex-II Pro Platform FPGA offers unmatched "system" capability along with a broad range of devices from which to choose. For more information on Virtex-II Pro Platform FPGAs and design resources, go to www.xilinx.com/virtex2pro.

Printable PDF version of this article.  (05/05/03) 115 KB