The new version of EDK offers automatic generation of complex implementation details, new simulation capabilities, and new IP cores.

The current market environment requires designs to be completed in a short time frame, with features that distinguish them from other products available in the market. Yet the majority of embedded designs fail to meet original specification goals because of time constraints and feature shortcomings in the chosen solution. Often, functionality is compromised to meet performance or quality requirements.

Over the years, embedded system designers had to use standard off-the-shelf discrete components in their applications. Much design time was spent on integrating these standard components so that they met system performance.

ASICs or ASSPs are also chosen as the solution when the production volumes warrant this path. In traditional ASIC flows, designers make most changes in the software to account for hardware limitations and inaccuracies, when problems are discovered late in the design cycle.

This situation is exacerbated as physical geometries shrink and chip fabrication becomes variable from design-to-design, not just from process-to-process. ASSPs are usually standard solutions with some nonstandard sections that allow for customization.

This customization can set the product apart from other solutions in a certain application area. However, ASSP solutions are also not a perfect fit, as designers have to create workarounds to address feature shortcomings. With standard off-theshelf discrete components, ASICs and ASSPs, designers end up with solutions that never quite meet their needs.

Xilinx Embedded Processor Solutions
The advent of the programmable platform – with system-level features such as memory, application-specific input/output to support varying interface standards, and now hard- and soft-processor cores – means that integration is already available. With this new capability, you can spend more time on other system challenges, meeting performance goals and shrinking market windows.

Xilinx offers several options to benefit embedded designers. These solutions include both hard- and soft-processor cores – configurable IP cores and a feature-rich design environment – currently available with the Embedded Development Kit (EDK) v6.1i. EDK can help you deliver a highly flexible and feature-rich embedded system.

The hard processor core is an IBM™ PowerPC™ 405 immersed in the Xilinx Virtex-II Pro™ FPGA, delivering 600 DMIPS at 400 Mhz, with as many as four cores available in the largest Virtex-II Pro device.

Alternatively, Xilinx also offers the MicroBlaze™ 32-bit RISC processor core, delivering up to 150 D-MIPS at up to 125 MHz when used in the Virtex-II Pro device. You can use the MicroBlaze processor to implement low-cost embedded systems, especially when using the Xilinx Spartan™-3 FPGA (see sidebar).

Both soft- and hard-processor cores use IBM CoreConnect bus technology as the interconnect bus for the embedded system. Xilinx also offers a complete set of soft peripherals to implement your embedded system, which is available with the Embedded Development Kit. Examples of these peripheral IP cores include UARTs, GPIO, 10/100 Ethernet MAC, IIC, and high-level data link controller (HDLC) cores that you can use to design embedded solutions for such market segments as networking and communications.

EDK v6.1i
EDK v6.1i is a comprehensive suite of system-level design tools that enables you to design embedded processor systems using Xilinx FPGAs. With the embedded tools within EDK, Xilinx is enabling the adoption of an open format called the Platform Specification Format (PSF). PSF provides an abstraction layer between the hardware and software platforms of an embedded design so that they can be tightly integrated during the development process. This coupling ensures that you can match the programming environment and capability of the software to the hardware resources available.

EDK v6.1i includes the Xilinx Platform Studio (XPS) (Figure 1), an all-encompassing design environment used to define, configure, and generate a custom hardware and matching software and programming environment for either a stand-alone or real-time operating system (RTOS)-enabled programmable system.

Hardware, software, and firmware engineers who need to work in both domains can use the XPS Integrated Design Environment included in EDK. EDK also interfaces with industry-standard software tools from leaders such as Wind River Systems™, MontaVista® Linux®, and popular GNU embedded tools.

Unrivaled Ease of Use
One of the greatest advantages EDK v6.1i offers is the ability to design a customized bootable embedded system in minutes. Using EDK, you can select a target processor core such as the MicroBlaze processor or PowerPC; a specific FPGA architecture; and a list of peripherals to generate a complete custom processing system.

Another huge benefit is the interface to industry-standard tools such as Wind River Systems’ Tornado™, which allows the design of high-performance PowerPC-based Virtex-II Pro-centric embedded systems requiring an RTOS.

Xilinx also provides a micro kernel OS within EDK. This provides a small memory footprint that includes several OS-like functions you can use to design PowerPC- or MicroBlaze-based embedded systems.

One of the biggest advantages in EDK that helps you start designing an embedded system in Xilinx FPGAs is the Base System Builder wizard, shown in Figure 2. This feature within XPS enables the creation of a custom PowerPC- or MicroBlaze-based computing platform (including peripherals and a memory map) with just a few clicks of the mouse. All detailed connections and a default memory map are generated automatically, resulting in a functional hardware design that is ready to be downloaded into a target board.

The automatic generation of a ready-to-use board support package (BSP) matching the defined hardware platform provides tremendous savings in development time. Hardware/software sections of the embedded design that can be problematic are handled automatically by the tools. This dramatically reduces the timeconsuming and frustrating phase of the debug and verification cycle common to many embedded applications.

Peripheral IP Catalog
The Embedded Development Kit offers an extensive list of soft IP cores that you can use to develop and design embedded systems. The cores are essentially divided into four categories: interface, memory controllers, infrastructure, and peripherals.

Examples of infrastructure cores include bus bridges and arbiters for different CoreConnect buses. Examples of interface IP cores include memory controllers such as Flash, DDR, SDRAM, and SDR that allow the use of external memory controllers as part of the embedded systems. The design environment also allows you to integrate proprietary cores into your design. Also available for your use is an extensive list of general peripheral cores such as SPI, IIC, UART, Timer/Counter, Watch Dog Timer, and GPIO, found in any processor subsystem.

There is also a growing list of high-value IP cores that you can purchase independently to plug-and-play in EDK. Examples of these high-value cores include Ethernet MAC 10/1000, 1 Gigabit Ethernet, and the HDLC controller with as many as 256 channels. The biggest advantage of these cores is that most of them are parameterizable within EDK. As opposed to standard solutions where not all of the features may be required for a design, embedded systems using these cores use only the logic that is needed without any waste.

Xilinx also has several partners that offer IP cores you can use to develop embedded designs in FPGAs.

Integration with ISE Logic Design Tools
Yet another benefit is the integration of the Embedded Development Kit with the recently released Xilinx ISE 6.1i. You can now access EDK from within ISE, thus eliminating the need to leave the ISE environment, and design a complete embedded system by invoking the EDK tools within ISE. This integration with Xilinx ISE 6.1i enables a more seamless and intuitive development environment with the rest of your FPGA design.

Debug Options
The Embedded Development Kit provides a feature-rich environment to debug designs in software and hardware. It includes a PowerPC and MicroBlaze Instruction Set Simulator (ISS) to enable the debugging of software code on the development workstation. Hardware simulation has been enhanced, with the ability to do mixed VHDL/Verilog™ simulation (including Xilinx LogiCORE™ and customer-created IP) as well as the ability to toggle between real-time logic (RTL), structural, and full timingbased simulations. The Single Step debugger from WindRiver Systems is also available for PowerPC in Virtex-II Pro-based embedded systems.

Extending the Xilinx leadership in hardware on-chip debug, EDK version 6.1i enables on-chip cross triggering between the logic and bus analyzer cores available with the Xilinx ChipScope™ Pro software tool and the GNU (gdb) debugger. Support for the visionProbe hardware debugger from WindRiver Systems is also available for PowerPC in Virtex-II Pro-based embedded systems.

Conclusion
Traditional embedded designers who had to use standard discrete off-the-shelf components, ASICs, or ASSPs to satisfy their system application needs now have the option to use a programmable platform to develop a custom system. Using a programmable platform offers several advantages, such as customization, consolidation, integration, and protection from component obsolescence.

The ability to use a design environment that provides an all-encompassing suite of tools and interfaces to familiar design entry methods further facilitates the development process and increases the overall speed of the design process. With EDK v6.1i, you now have access to a suite of embedded tools from Xilinx that take care of those complicated steps that are part of the embedded design process. Thus, you can focus more on creating a custom platform with unique features that bring value to your system, as opposed to the mundane ones available from your competitors.

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