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Think Outside the Chip

by Douglas W. Olsen, Field Applications Engineer, NuHorizons Electronics
dolsen@nuhorizons.com (12/11/03)

Use the Xilinx ChipScope Pro integrated logic analyzer for FPGAs as a board- and system-level diagnostic tool.

Your FPGA designs have become increasingly dense and complex. They are difficult to debug because more and more of the relevant signals are buried deep within the logic fabric.

Moreover, your board and system designs are also more complex and densely packaged. Whether you’re troubleshooting in the lab or in the field, your access to signals in the FPGA, on the board, or in the system is very restricted.

The Xilinx ChipScope™ Pro integrated logic analyzer (ILA) has solved much of the problem at the FPGA level. You can embed its real-time data collection and reporting cores in your FPGA to provide visibility to internal FPGA signals and events.

But if that’s all you’re using ChipScope for, you’re not getting the most out of this powerful tool. With a little forethought during the design of your board and system, you can extract more value from the ChipScope Pro ILA during the entire product life cycle – from initial debug of board-level signals in the lab through system diagnosis and maintenance in the field.

ChipScope Pro – A Review
ChipScope Pro is a “logic analyzer in an FPGA.” It provides real-time debug and verification capabilities for your FPGA design. You can find all the details about the ChipScope Pro ILA at www.xilinx.com/ise/verification/chipscope_pro.htm.

You interact with ChipScope Pro using a familiar logic analyzer interface running on your PC, which is connected to your hardware under test via a JTAG interface.

Figure 1 illustrates a simple ChipScope Pro design example.

ChipScope Pro Basics
The ChipScope Pro program consists of two main core types in the FPGA, plus software running on your PC:

  • ILA core – With the assistance of a core inserter program, you embed the ChipScope Pro ILA core in your FPGA design to collect data when trigger conditions are satisfied. You can easily tailor the data size, target signals, and basic trigger architecture during the design phase. You can set flexible trigger conditions at debug time. (Target signals can be changed using the Xilinx FPGA editor probe tool without requiring re-synthesis, replace, or re-route of your design.) As many as 15 ILA cores can be embedded into one FPGA.
  • ICON core – You embed the integrated controller (ICON) core in your FPGA design to control as many as 15 ILA cores. This ICON core governs each ILA core and communicates with the ChipScope software running on your PC over the JTAG interface and the Xilinx Parallel IV or MultiLINX™ cable.
  • ChipScope PC software – You interact with the hardware under test using ChipScope Pro software running on your PC. You spend minimal time learning to use this software, because it is so similar to a hardware logic analyzer. You can set trigger conditions and examine collected data using this software. You can also export collected data in a variety of file formats for analysis by other tools, or for incorporation into documentation.
ChipScope Pro at the Board Level
Consider this: As the lead engineer for a new board design, your job is to compose the block diagram. Your knowledge and duties include:
  • Partitioning a multitude of complex functions into various circuits on the board
  • Allocating many of the circuits to reside in one or more Xilinx FPGAs on the board
  • Recognizing the need to provide a means of debugging the many internal FPGA designs
  • Realizing that the ChipScope Pro tool can economically provide visibility to all FPGA signals
  • Knowing that the ChipScope Pro tool requires no more design resources than the JTAG interface already provided for FPGA configuration
  • Using some incremental FPGA resources (mostly block RAM) for ChipScope Pro data collection.
Think Outside the Chip
While considering FPGA debug options, you realize that:
  • Your board design is very complex and spatially dense.
  • The board circuits outside your FPGAs are not going to be any easier to debug than the internal FPGA designs.
  • You do not have room to provide test point headers or connectors for all the board signals that will require further examination.
Should you route these board-level signals to spare pins on the FPGA?
Yes – then you can connect the signals to the ChipScope Pro ILA core provisioned for internal FPGA signal debugging. If you anticipate that your primary FPGA functional designs will consume all of the I/O pins or internal logic resources, you must consider upgrading to the next package size or logic density. The following benefits will outweigh the incremental cost:
  • Decreased debug and development time
  • Flexible, permanent debug signal routing
  • Built-in board-level instrumentation, which leads to
  • Reduced demand for scarce lab instruments during peak debug activity.
Figure 2 illustrates ChipScope Pro utilized as a board-level test tool. Notice its similarity to Figure 1, where ChipScope Pro is used as an FPGA-only tool.

ChipScope Pro at the System Level
You, as the system engineer for your company’s sophisticated new product, must achieve multiple objectives, such as:

  • Ensuring that system development and integration flow as smoothly as possible, thus minimizing your time to market
  • Providing an easily maintainable product to minimize service costs for the product’s overall life cycle.

Incorporate Instrumentation
What if every system that you integrate and ship could include the capability of built-in instrumentation? By utilizing the same Xilinx ChipScope Pro program that your board-level engineers use to debug FPGA designs, you can configure your products for system integration and field maintenance.

This will cost you nothing more than a few judiciously chosen system-level signals routed to a Xilinx FPGA; some incremental FPGA resources (mostly block RAM); an accessible JTAG connector; and some up-front system design time and planning. These costs will be overshadowed by the following benefits:

  • Decreased system integration time
  • Built-in system-level instrumentation
  • Reduced demand for scarce lab instruments during peak integration activity
  • Flexible, permanent maintenance and diagnostic signal routing.
During system integration, engineers can connect a PC running ChipScope Pro software to the system JTAG port, and monitor system-level signals.

You don’t have to use a dedicated hardware logic analyzer. Production test engineers can readily adopt this capability and use system signals during acceptance testing. System installers can utilize ChipScope Pro’s capability at customer sites to debug problems, or to ensure proper operation. Going forward, maintenance personnel can troubleshoot system problems using no more than a laptop PC running ChipScope Pro software.

Figure 3 illustrates ChipScope Pro used as a system-level test tool, which builds on the board-level test tool of Figure 2.

Design Example
I developed the concept of extending ChipScope Pro’s utility when I undertook a design in my poorly equipped basement lab using a Xilinx CoolRunner-II CPLD evaluation board from NuHorizons Electronics. Although the design was simple, I needed to examine four or five dynamic signals simultaneously on the CPLD board, equipped with only a digital volt-amp-ohmmeter, and no oscilloscope or logic analyzer.

Necessity Is the Mother of Invention
Fortunately, I also had a Xilinx evaluation board containing a Virtex XCV400 FPGA. Although this was a relatively small FPGA, it was more than sufficient to house the ChipScope Pro ICON core and a simple eight-channel ILA core.

In this particular case, my implementation of ChipScope Pro was the ultimate in simplicity: no internal FPGA signals were connected to the ILA core. Rather, the eight ILA core data/trigger signals were routed directly to I/O pins, which terminated at a header on the FPGA evaluation board. I connected wires to those pins, which I then used as probes on my CPLD board.

I was able to debug my CPLD design after just a few iterations of coding, downloading, and collection of data via the ChipScope Pro software.

For the modest cost of the ChipScope Pro utility, plus a small FPGA board and JTAG cable, I discovered that you can replicate the functionality of a logic analyzer that would otherwise cost thousands of dollars.

Some Suggestions
To utilize the ChipScope Pro software as a board-level tool, follow these suggestions:

  • Provide access to the FPGA’s JTAG port.
  • Anticipate which board-level signals you might want to examine during debug.
  • Route these signals to the FPGA so you will have board-level access.
  • Dedicate some extra I/O pins on your FPGA to accommodate board-level signals requiring examination.
  • Anticipate some extra internal FPGA resources (mostly block RAM) for ChipScope Pro’s collection of boardlevel signal samples.
  • After analyzing the dynamic properties of the signals of interest, make sure you have an appropriate clock signal so the ChipScope Pro tool can process your board-level signals.
To utilize the ChipScope Pro program as a system-level tool, follow these suggestions:
  • Provide access to an appropriate system-level JTAG port.
  • Anticipate which system-level signals you will want to examine during system integration and life cycle support.
  • Route these signals on boards and backplanes or cables to the FPGA chosen to host the system-level JTAG interface.
  • Dedicate adequate FPGA resources (I/O pins and logic) to accommodate the system-level signals of interest.
  • After analyzing the dynamic properties of the signals of interest, make sure you have an appropriate clock signal so ChipScope Pro can process your system-level signals.
  • In the unlikely case that your system contains no other FPGAs, it would be worth the cost of a small FPGA in which to embed the ChipScope Pro core as an economical integrated system-level logic analyzer.
Conclusion
You can add value to your FPGA-based product by expanding the use of the Xilinx ChipScope Pro integrated logic analyzer “outside the chip” of the FPGA design.

You have already invested in ChipScope Pro for debugging the internal FPGA design. You can decrease your board- and system-level debug time for zero additional tool costs, and minimal up-front design time and resources. Additionally, you can enhance your product with permanent system diagnostic and maintenance capabilities for its entire life cycle.

Printable PDF version of this article with graphics. PDF logo (12/11/03) 265 KB

 
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