Innovative technology significantly increases in-circuit debug productivity.

FPGAs play an increasingly important role in project development, where the need for high-performance designs with flexible architectures collides with lean engineering teams, constrained budgets, and rapid development schedules. Yet traditional in-circuit debug methodologies limit how quickly designers can uncover design problems.

Often, design defects in increasingly complex systems may occur exclusively in real time, when multiple subsystems and software interact. Using FPGAs, design teams can move quickly to system integration, increasing the importance of effective debug and validation. With sufficient visibility, in-circuit debug of FPGA designs can uncover in just a few minutes problems that might have required hours, days, or weeks to simulate.

Logic analyzer measurements are particularly effective in the debug of FPGAs and surrounding systems. A typical measurement approach is to take advantage of the programmability of the FPGA to route internal signals to a small number of pins. Although this is a very useful approach, it has limitations that inhibit productivity.

Because pins on the FPGA are typically an expensive resource, there are a relatively small number available for debug. One pin is required for each internal signal to be probed, thereby limiting the visibility of internal nodes to the same small number of signals. Design teams rarely find this width of visibility adequate.

When different internal signals are measured, new signals are routed out to pins; sometimes, a recompile of the design is required. In either case, the change consumes valuable engineering resources and can change the timing of the FPGA. To make sense of the measuring, engineers must manually update logic analyzer label names and probe locations to match the new configuration of the measurement every time new signals are routed to pins.

New technology from Agilent Technologies and Xilinx mitigates the issues described above by combining ChipScope™ Pro technology with Agilent’s FPGA dynamic probe logic analysis application. Figure 1 shows the key components of the application.

You can use the Xilinx Core Inserter or CORE Generator™ tool to insert an Agilent Trace Core 2 (ATC2) into an FPGA, thus facilitating a more productive debug session. The core is controlled by Agilent’s FPGA dynamic probe logic analysis application software. The application runs on Agilent’s 1680, 1690, or 16900 series logic analyzers.

Time-to-Market Advantages
The FPGA dynamic probe delivers four primary benefits:

1. The ATC2 core allows a dynamic approach to choose internal signals for logic analysis – without incurring the limitations (such as potential recompiles and the associated timing impact) of the traditional “route out signals to pins” approach.

   Using Core Inserter, you can specify groups of internal FPGA signals that might need measurement. Each group of signals represents an input to the ATC2 core. The core allows one group of input signals to be routed to pins. With a mouse-click in the logic analysis application software, the analyzer changes which group of internal FPGA signals are routed through the core. This capability eliminates the need to recompile to change signal probing, saving days of development time per FPGA design. In addition, this method keeps timing constant.

2. Although a 1:1 internal signal-to-pin ratio normally exists for debug, the FPGA dynamic probe increases this visibility ratio to 64:1. With 32 input groups into the ATC2 core, a single pin can sequentially gain access to 32 internal signals. With an optional 2X compression mode, each pin accesses two signals on each of the 32 input groups, for a total visibility of 64 signals per pin.

   This means that for each pin dedicated to debug, you can access as many as 64 internal signals (Figure 2). With this increased visibility width for certain types of validation requirements, you can bypass the time-consuming process of creating test benches and perform the validation more quickly in-circuit.

3. The FPGA dynamic probe automates the process of label naming when a new set of internal signals is selected. Logic analyzers with this application read a file from a .cdc file that the Core Inserter generates. This file contains all node names of signals that may be eventually selected.

   Because the tool tracks which signals are currently routed through the ATC2 core, the software application running on the logic analyzer automatically enters signal names and channel locations on the logic analysis setup menu each time a new set of internal signals is probed (Figure 3). This additionally saves time and eliminates errors.

4. The FPGA dynamic probe helps you make more accurate state measurements. The core invokes test stimulus that is acquired by the logic analyzer. The logic analyzer samples the test pattern and automatically determines when to best sample each signal relative to the clock. This calibration capability compensates for path length variances, ensuring accurate state measurements. This is particularly beneficial on high-speed circuits with narrow data valid windows.

As an example, an ATC2 core with eight bits of visibility on each of 32 input banks consumes only about 2% of the slices in a XC2V3000 device. This core offers access to 256 signals using just eight pins.

A smaller number of input banks and fewer pins allows the core to consume fewer FPGA resources. A higher number of input banks and more pins increases visibility. You can make tradeoffs depending on the specific device and visibility requirements.

The ATC2 core runs as fast as the device runs, so measurement speeds are limited only by the acquisition capabilities of the logic analyzer. With state speeds well in excess of 200 MHz and timing speeds of 4 GHz, most new logic analyzers contain enough headroom to make accurate FPGA measurements for the next several years.

When you have significant debug issues, you can create multiple ATC2 cores that coexist peacefully within a single device. The FPGA dynamic probe application software can also control ATC2 cores in multiple FPGAs, as long as the FPGAs are on the same scan chain.

The new technology allows you to more easily correlate internal FPGAs to external events, thus isolating problems more quickly. When the ATC2 core facilitates measurements internal to the FPGA, the logic analyzer can time-correlate these measurements with measurements elsewhere on the target system. This capability allows you to gain insight into your system designs more quickly.

The FPGA dynamic probe virtual probing technology, combined with a logic analyzer, blurs the boundary between internal FPGA measurements and external measurements.

Conclusion
The joint collaboration between Xilinx and Agilent in producing the royalty-free ATC2 core and the FPGA dynamic probe will enable more productive in-circuit debug. Agilent has already used this technology internally to shave weeks of development time from a critical project that used multiple Xilinx FPGAs. The lead hardware engineer found that the solution allowed him to uncover in a few minutes problems that would have traditionally required hours or days to reveal.

As FPGA sizes increase and bigger designs take advantage of increased densities, successful design teams will adapt by employing innovative debug methodologies. The FPGA dynamic probe and ATC2 core provide critical capabilities for effective debugging. With these new tools, you can plan for debug early in the development process. Employing a design-for-debug methodology will allow you to keep pace with ever-increasing design sophistication.

ChipScope Pro software makes it possible for Xilinx FPGA users to easily debug designs. ChipScope Pro cores are integrated into the FPGA to provide real-time debug and verification capabilities via a standard JTAG port. ChipScope Pro is available from Xilinx for $695. A 30-day downloadable evaluation version is available for free. For more information, visit www.xilinx.com/chipscopepro/.

You can purchase Agilent’s FPGA dynamic probe logic analysis application for an introductory price of $995 through the end of 2004. For more information on the Agilent FPGA dynamic probe, the ATC2 core, and supported logic analyzers, visit www.agilent.com/find/FPGA/.

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