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Home : Documentation : Xcell Journal Online : Article
Backplane Characterization Techniques



by Eric Bogatin, Ph.D., President, Bogatin Enterprises
eric@BogEnt.com (3/25/04)

High-bandwidth measurements of backplane differential channels are critically important for all high-speed serial links. Four-port VNA measurements can identify important electrical features and predict backplane performance.

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The latest generation of Virtex-II Pro™ and Virtex-II Pro X™ devices features RocketIO™ and RocketIO X transceivers that can drive high-speed serial links at line rates of up to 10 Gbps. Two important features of high-speed serial links make the behavior of these signals very different from those found on traditional on-board buses. First are the shorter rise time and associated higher bandwidth signals; this makes the signals more sensitive to small imperfections. Second are the longer interconnect lengths; this makes the signals more sensitive to attenuation effects. Both effects contribute to rise time degradation, inter-symbol interference (ISI), and collapse of the eye diagram.

Although it is possible (and important) to model and simulate these two physical features, it is difficult to do so accurately. We are still low on the learning curve, where feedback from measurements on real systems is critically important to improve models and optimize the design for performance.

When first article hardware is available, measurements on the passive interconnects can provide valuable insight on the expected system-level performance independent of your choice of silicon drivers and receivers. With accurate measurement-based models, you can optimize the cost/performance tradeoffs of silicon selection.

The Bandwidth of the Measurement
Bandwidth is the highest sine wave frequency component that is significant. “Significant” means the frequency at which a harmonic of the signal is greater than -3 dB of the amplitude the same harmonic an ideal square wave at the same clock frequency would have. If the signal edge is roughly Gaussian with a 10-90% rise time (RT), the bandwidth (BW) is approximately:

       BW = 0.35/RT

For example, a rise time of 0.1 ns has a bandwidth of about 0.35/0.1 ~ 3.5 GHz. Usually, the bit rate is specified in a highspeed serial link. To estimate the bandwidth of the signal, we need to have an estimate of the rise time. Assuming that the rise time is 25% of the bit period, then the bandwidth of the signal is approximately:

       BWsignal = 0.35/0.25 BR~1.4 x BR

As a general rule of thumb, the highest sine wave frequency component in a highspeed serial link is about 1.4 times the bit rate. For a 2.5 Gbps signal, the bandwidth is about 3.5 GHz. If it is important to know whether the bandwidth is really 3.5 GHz or 4 GHz, the term “bandwidth” is misused, as it is not accurate enough to make this fine a distinction. Rather, you should use the entire spectrum.

To have confidence in the accuracy of a model, the bandwidth of that model – the highest sine wave frequency at which the simulated electrical performance still matches the measured performance of the real structure – should be at least twice the bandwidth of the signal to allow for a reasonable margin. Likewise, the bandwidth of the measurement should be at least twice the bandwidth of the signal. This rule of thumb suggests that the bandwidth of the measurement should be at least:

       BWmeasurement = 3 x BR

If the bit rate is 10 Gbps, the bandwidth of any model used (or the bandwidth of the measurement of the interconnect) should be at least 30 GHz. Of course, if the rise time of the bit pattern is longer than 25% of the bit period, the measurement bandwidth might be reduced from this rule of thumb.

Unfortunately, the higher the bandwidth required, the more expensive it is (both in resources, time, and money) to perform a measurement or create a model of an interconnect. That is why it is so important to have a rough idea of the bandwidth requirements so as to minimize the cost. As high-speed serial links approach the 10 Gbps rate, measurement bandwidths need to be at least 30 GHz. Accurate measurements in this regime get increasingly more difficult with each generation of bit rate.

No Such Thing as a Free Launch
Credit that clever turn of phrase to Scott McMorrow, president of Teraspeed Consulting. Probing a channel on a board or a backplane introduces errors that might not be there, or be of a different magnitude, than in the actual product when signals are launched from chips in packages.

All high-performance measurement instruments, such as a time domain reflectometer (TDR) or a vector network analyzer (VNA), have a standard connector on the front face, typically APC-7 or 3.5 mm. High-performance cables are used to get from the instrument to the device under test. However, the interface from the cable to the board traces under test can introduce impedance discontinuities which degrade the signal getting onto the trace.

The larger the discontinuity, the more high-frequency components reflect back to the source, and the fewer that get launched into the transmission line. If characterizing a path for 5 Gbps signals, the connection method may limit the measured system performance. To increase the bandwidth of the characterization, you must consider the launch before designing and building the board.

A key ingredient in the design for test for high-bandwidth characterization is to use a pad and via design transparent to the signal. This typically means using a small diameter via with a surface-mount connector and optimizing the clearance holes in the planes. Alternatively, you could use a copper fill adjacent to the signal via being probed, with the copper fill connected to return path vias adjacent to the signal via so you could use microprobes.

Figure 1 shows the TDR response for different connection designs. The top curve is the TDR response (with a roughly 35 ps rise time) for a conventional through-hole Sub Miniature version A (SMA) connection to a bottom trace. On this scale, one division is a reflection coefficient of 10% and corresponds to an impedance change of about 10 Ohms. At this rise time, the impedance discontinuity is more than 18 Ohms, and is predominately capacitive.

You might think that avoiding the vias will prevent the impedance discontinuity, but just as many problems can be generated by an edge-coupled SMA attached directly to a surface trace. The second curve in Figure 1 shows the measured TDR response of an edge-coupled launch using an SMA. The impedance discontinuity is more than 18 Ohms at this rise time and is inductive.

One way to avoid this problem is to use microprobes and design the surface pads for probing. The key feature is to use a copper fill shorted to all adjacent ground vias. In Figure 1, the gray vias have been shorted to the copper fill. With this configuration, you can probe every signal.

The third TDR curve in Figure 1 shows the response of a microprobe launch into an optimized 50 Ohm stripline. The impedance discontinuity at this rise time is less than 5 Ohms and is inductive. Finally, it is possible to use an SMA connection to a circuit board trace if it is optimized. The bottom curve in Figure 1 shows such a connection. Its impedance discontinuity, less than 5 Ohms, compares to a microprobe launch.

High-Bandwidth Measurements
All high-bandwidth measurements take advantage of what is normally a problem encountered by high-bandwidth signals: reflections from impedance discontinuities. As a signal propagates down an interconnect, if the instantaneous impedance the signal sees ever changes, a reflection will occur and the transmitted signal will be distorted. The magnitude of the reflected signal will depend on the change in impedance.

By using a calibrated reference signal – a sine wave in the frequency domain and a Gaussian step edge in the time domain – and measuring the amount of signal reflected back from an interconnect as well as transmitted through it, you can extract the electrical properties of the interconnect. All of the electrical properties of the interconnect path are contained in these two basic measurements.

When displaying data in the frequency domain, the reflected signal is called the return loss and the transmitted signal is called the insertion loss. These two metrics have become the universal standard to characterize the fundamental properties of an interconnect, such as a channel path in a backplane. Many of the important physical layer properties of a backplane can be read directly from the return and insertion loss of both single-ended and differential channels.

When displaying data in the time domain, the reflected signal gives direct insight into how the physical structure contributes to electrical impedance discontinuities. The transmitted signal in the time domain gives a direct measure of the propagation delay and rise time degradation. From this result, an eye diagram can be synthesized.

Whether you’ve measured the data in the time or frequency domain, it can be transformed into either one. A VNA will measure the response in the frequency domain, while a TDR will measure the response in the time domain. With appropriate software, you can convert the data from either instrument into both domains.

All high-speed serial links today use differential signaling and backplane channels routed on differential pairs. For these structures, the same metrics of return and insertion loss are used, but there are additional terms. Both differential and common signals will have a return and insertion loss, with mode conversion terms of differential signal in, common signal out and common signal in, and differential signal out.

Differential S-Parameters
The description of return and insertion loss measurements borrows from a formalism heavily used in the RF world based on scattering or S-parameters. It’s just a shorthand way of keeping track of all the different measurements.

In a differential channel, the interconnect is a single, differential pair, with the two ends labeled port 1 and port 2. The ratio of the reflected sine wave signal coming out of port 1 to the incident sine wave signal going into port 1 is labeled S11. This is the return loss.

The ratio of the transmitted sine wave signal coming out of port 2 to the incident sine wave signal going into port 1 is labeled S21. This is the insertion loss.

A complication arises in a differential pair, where you must consider not only the port at which signals appear but also the nature of the signal (differential or common). There are four choices:

  • A differential signal going in and coming out, which would be the differential return and insertion loss, SDD11 and SDD21
  • A common signal going in and coming out, which would be the common return and insertion loss, SCC11 and SCC21
  • A differential signal going in and a common signal coming out, a type of mode conversion, SCD11 and SCD21
  • A common signal going in and a differential signal coming out, a type of mode conversion, SDC11 and SDC21.
Don’t forget the case of the signal going in from port 2 rather than port 1. All of these combinations result in 16 differential S-parameters, which are arrayed in a matrix. Each set of terms has significance, but the most important are the differential return and insertion loss and the differential to common mode conversion.

Differential Return Loss
SDD11 is a direct measure of the impedance discontinuities encountered by the differential signal propagating through the channel. Figure 2 is an example of the measured differential return loss of a backplane trace in the frequency domain up to 20 GHz. The more negative the decibel value, the less reflected signal and the better the impedance match.

It’s a little difficult to interpret the measurement in the frequency domain. This is a case where transforming the data to the time domain gives immediate insight.

Figure 3 is the same data displayed in the time domain. In this display, you can identify the discontinuity from the SMA launch, the high impedance of the daughtercard, and the capacitive discontinuity of the vias in the backplane.

Differential Insertion Loss
SDD21 is a direct measure of the quality of the transmitted differential signal through the channel. In the frequency domain we can read the bandwidth of the interconnect directly off the screen. The maximum useable bandwidth of the channel is set by the frequency at which the attenuation is below the usable value, typically about -15 dB of loss, depending on the SerDes. The more discontinuities and losses, the higher the attenuation, and the lower the bandwidth.

Figure 4 shows the measured SDD21 for two different length channels, including the higher bandwidth of the shorter channel.

Using the limiting attenuation as -15 dB, the short channel has a usable bandwidth of about 4 GHz, and the long channel has a usable bandwidth of about 3 GHz. This would correspond to a usable bit rate of roughly 2.5 Gbps and 2 Gbps. However, it is more than just the attenuation that determines the maximum usable bit rate.

A better estimator for the maximum usable bit rate is the eye diagram. Even though this differential insertion loss was measured in the frequency domain, it can be translated into the time domain, and as a response function can be used to calculate an eye diagram.

Figure 5 shows the calculated eye diagram for a 25-inch channel with 2.5 Gbps and 5 Gbps signals. Based on this measured response, this channel might be useful for even 5 Gbps data rates, with an appropriate receiver.

Mode Conversion
Any asymmetry between the two lines that make up the differential pair will convert some of the transmitted differential signal into common signal. This will create two problems. If any of this created common signal gets out of the channel onto external twisted pairs, it will potentially contribute to electromagnetic interference. Of course, every good design should have integrated common signal chokes in all external twisted pair connectors. However, it is always good practice to try to reduce the source of the noise before filtering.

The second problem isn’t so much from the common signal created but from the impact on the differential signal from what caused the conversion. One of the most common sources of mode conversion is a difference in the time delay of each channel. This line-to-line skew within a channel will convert differential signals to common signals and result in increased rise time degradation of the differential signal and larger deterministic jitter.

The total amount of common signal coming out of port 2, based on a pure differential signal going into port 1, is described by the SCD21 term. Figure 6 shows the response for this channel. Looking at the time evolution of the creation of the converted common signal coming out of port 1, we can gain insight into where the conversion might be occurring. Figure 7 shows the SCD11 term, displayed in the time domain, compared with the SDD11 term, which has information about the physical features of the channel.

It appears as though most of the mode conversion occurs in the via field of the backplane side of the connector to the daughtercard. Additional mode conversion exists at each of the connector locations in the backplane. This might be caused by the via fields or an asymmetry between the two lines in the differential pair, such as a spatial difference in the dielectric constant each trace sees.

Conclusion
Everything you ever wanted to know about the electrical characteristics of a differential channel is contained in the differential Sparameters. They can be measured in the time domain or the frequency domain and displayed in either, and each one offers a different insight.

Measurements play an important role in risk reduction when designing systems incorporating Rocket IO or RocketIO X transceivers. Although it is important to integrate simulation tools into the design process to perform cost/benefit analyses of technology and design tradeoffs, it is also important to use measurements to verify the accuracy of the simulation process.

Measurements can also offer immediate insight into the behavior of first article hardware to evaluate whether they meet specifications, and how well the interconnects will interact with the silicon.

Additional Resources
For more information about this and other signal integrity topics, visit www.BogEnt.com.

Acknowledgments
The data in this paper was graciously provided by Maria Brown of Agilent Technologies and Al Neves and Dima Smolyansky of TDA Systems Inc.

Printable PDF version of this article with graphics. PDF logo (3/25/04) 400 KB

 
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