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Feature Articles -- Issue 49


Celebrating 20 Years of Leadership When the Xilinx founders created their first business plan in 1984, they agreed on a lofty goal: “To be the leading company designing, manufacturing, marketing, and supporting user-configurable logic arrays for the application-specific market.”
High-Speed PCB Design: Issues, Tools, and Methodologies In this series on signal integrity, Xcell explores tools and methods you can use to combat signal and power integrity distortions throughout product development.
For Synchronous Signals, Timing is Everything Mentor Graphics highlights a proven methodology for implementing pre-layout Tco correction and flight time simulation with Virtex-II and Virtex-II Pro FPGAs.
The Next Gold Standard? The Advanced Telecom Compute Architecture standard has great potential for widespread adoption in next-generation infrastructure applications.
Backplane Characterization Techniques High-bandwidth measurements of backplane differential channels are critically important for all high-speed serial links. Four-port VNA measurements can identify important electrical features and predict backplane performance.
Better...Stronger...Faster Virtex-II Pro FPGAs offer marked performance advantages over a competing device.
Create ATCA-Compliant Designs Xilinx and Avnet have released a new design kit that reduces time to market for a wide range of serial backplane applications.
Secure Your Consumer Design with CoolRunner-II CPLDs CoolRunner-II CPLDs offer unique features to ensure a more secure design and reduce the rist of reverse engineering.

Article Listing -- Issue 49

  Interfacing SMA Connectors to Virtex-II Pro MGTs
  Designing High-Speed Interconnects for High-Bandwidth FPGAs
  Accurate Multi-Gigabit Link Simulation with HSPICE
  Eyes Wide Open
  A Low-Cost Solution for Debugging MGT Designs
  Tolerance Calculations in Power Distribution Networks
  High-Speed PCB Design Resources
  The FPGA Dynamic Probe
  Xilinx 6.2i Design Tools
  Programmable Logic Solutions for Next-Generation Serial Backplanes
  VEthernet Aggregation with GFP Framing in Virtex-II Pro
  Mesh Fabric Switching with Virtex-II Pro FPGAs
  Programming Flash Memory from FPGAs and CPLDs Using the JTAG Port
  Developing the New Platform Flash PROM
  Accelerate and Verify Algorithms with the XtremeDSP Development Kit-II
  Increase Image Processing System Performance with FPGAs
  Enabling Low-Cost DSP Co-Processing with Spartan-3 FPGAs
  Tips for Improving Synplicity Pro Performance for FPGA Designs
  Virtex-II and Spartan-3 Aid Ubiquitous Wireless Control Networking
  Creating Pb-Free Packaging
  TechXclusives: A Valuable Source of Information
Xcell cover 49
XCELL Journal Issue 49
Summer 2004


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Letter From the Editor
Close Isn't Good Enough Anymore



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