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Home : Documentation : Xcell Journal Online : Article
Meeting Interoperability Standards



by Sam Sanyal, Solutions Marketing Manager, Xilinx, Inc.
sam.sanyal@xilinx.com (8/1/04)


The University of New Hampshire InterOperability Lab completes conformance testing for the Xilinx Ethernet family.
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Conformance tests are one of the most important items for embedded platforms like the Xilinx® Virtex™ and Spartan™ family of FPGAs. As these platforms are built on multiple building blocks, using standardsbased technology that is independently tested addresses key issues such as accelerated time to market and interoperability. Getting Xilinx products tested also demonstrates our commitment to the technology.

Xilinx is the first FPGA vendor in the industry to meet the University of New Hampshire (UNH) IEEE 802.3 standard for Xilinx 10/100, 1 Gbps, and 10 Gbps MAC conformance tests. The UNH InterOperability Lab (IOL) tests are key in establishing our product line, winning designs, and building customer confidence.

Adhering to standards and undergoing testing by reputable organizations like the UNH IOL ensures interoperability between systems, networks, and applications. Because enterprises have the flexibility to choose best-in-class solutions, conformance testing fosters competition and innovation between solution providers.

Why UNH IOL Conformance?
The UNH IOL has the longest history of fostering interoperability and conformance in connectivity technologies. Through their independent testing methodology and relationships with major corporations and industry engineers, numerous companies have refined their technologies and extended their products’ compatibility.

Specification standards are established in the hope that products from different vendors can interoperate with each other; for example, that two Ethernet cards purchased from two different vendors will communicate. This enables you to choose the system that best meets your needs for each application.

In the past, some vendors made claims of interoperability that were not quite achieved. However, this is not the case anymore; a number of vendors have successfully tested interoperability together at the UNH IOL. The limitations are better addressed through their tests.

A successful UNH conformance test is a confidence builder that ensures project success in the shortest possible development time.

The UNH IOL features:

  • A neutral environment. A win-win situation for everyone involved, neutrality is achieved by using standard test beds, methodologies, and tools.
  • Industry involvement. The IOL’s participation in various trade associations and standards organizations keeps the lab appraised of the latest developments in technology. In turn, the IOL effects positive change in standards organizations by providing technical contributions, editorial assistance, verification, and feedback during standards development.
  • Enhanced image and visibility. The UNH IOL testing consortium’s relationship with industry leaders (Cisco Systems™, Broadcom™, Cadence™, Dell™, HP™, Conexant™, Brocade™, and 3Com™) works as an indirect advertising tool for your products.
  • Excellence in testing services. Through industry-recognized standardized and custom test suites, expertise, advanced testing facilities and equipment, open and widely reviewed testing procedures for both conformance and interoperability testing creates confidence in your product with plug-and-play capability in a heterogeneous network.
Test Routines
Many more tests are available from the UNH IOL, but the tests listed here were performed on Xilinx devices.

Tests Configuration for 10/100
MAC conformance testing included the following test suites:

  • Collision Detect/Enforcement Test (Half Duplex)
  • Collision Detection Timing Sensitivity Test (Half Duplex)
  • Late Collision Detection Test (Half Duplex Only)
  • Retransmission Attempt Limit Test (Half Duplex Only)
  • Collision Backoff Algorithm (Half Duplex Only)
  • No Collision Test (Full Duplex Only)
  • FCS Error Test
  • Alignment Error Test
  • Fragment/Runt Test
  • Large Frame Test
  • Jabber Frame Test
  • Received Preamble Test
  • Start of Frame Delimiter Test
  • Frame Length Test
  • Minimum Received Inter-Frame Gap
  • Transmit Preamble Test
  • Minimum Transmitted Inter-Frame Gap
  • Defer to Carrier Sense While Frame Waiting
  • Deference after Collision
  • Do Not Defer Test (Full Duplex)
Flow control conformance testing included the following test suites:
  • Receive PAUSE Frame with Zero pause_time
  • Receive PAUSE Frame with Non-Zero pause_time
  • Resume Transmission
  • Discard Invalid PAUSE Frames
  • Receive JUMBO MAC Control PAUSE Frames
  • Receive RUNT MAC Control PAUSE Frames
  • Receive MAC Control PAUSE Frames with Incorrect CRC
  • PAUSE Frame Transmission
PCS conformance testing included the following test suites:
  • End of Stream Delimiter Test
  • Invalid Data Symbol Test
  • False Carrier Detect
Figure 1 shows a block diagram of the test setup of an Insight Virtex-II™ (DSBD- V2MB1000) board with a P160 communications module (DS-BD-MBEXF1).

Tests Configuration for 1 Gbps
The Figure 2 block diagram of the test design based on the ML320 platform makes use of the PowerPC™ processor in Virtex-II Pro™ devices as well as an internally developed asynchronous FIFO and with firmware developed in C.

MAC conformance testing included the following nine test suites:

  • Frame with FCS Errors
  • Fragments and Runts
  • Transmit Proper SFD and Preamble
  • Receive Variable Preamble
  • Does Not Defer
  • No Collisions
  • No Extension
  • No Bursting
  • Transmission of Minimum Inter-Frame Gap
Flow control conformance testing included the following five test suites:
  • Receive PAUSE Frame with Zero pause_time
  • Receive PAUSE Frame with Non-Zero pause_time
  • Resume Transmission
  • Receive PAUSE Frames of Incorrect Size
  • PAUSE Frame Transmission
The UNH IOL also performed PCS, Auto-Negotiation, and Point-to-Point Interoperability tests.

Tests Configuration for 10 Gbps
The UNH IOL performs MAC tests on the frame reception and frame transmission. The frame reception tests cover MAC operations specific to reception of frames, designed to verify that the device under test (DUT) properly receives valid frames, discards frames with errors, and reports these errors if possible. The test setup was done according to the block diagram shown in Figure 3.

The UNH IOL performed these specific tests on the Xilinx DUT:

  • Frames Greater than Max Frame Size
  • Frames with Length Errors
  • Receive All Frame Sizes 64-1518 (or 1,522) Bytes
The frame transmission tests cover MAC operations specific to the transmission of MAC frames, designed to verify that the DUT transmits properly formed MAC frames.

They also performed these specific tests on the DUT:

  • Transmit Proper Length within the Length/Type Field
  • Compute and Transmit Proper CRC
  • Transmission of Minimum Inter-Frame Gap
Figure 3 shows the setup used throughout the testing process. An arbitrary waveform generator (AWG) is used to generate the required clock signals. A PC communicated with the testing station using National Instruments’™ LabView software, to download firmware for the DUT and access Xilinx ChipScope™ embedded logic analyzers.

The XGMII interface of the DUT was used to provide access below the MAC layer in all test cases. Using multiple ChipScope embedded logic analyzers for bus monitoring and a transmit frame generator module obtained access above the MAC layer.

Reconciliation sublayer tests are designed to verify that the DUT reacts properly to the receipt of data, both valid and invalid, at the reconciliation sublayer.

The UNH IOL performed these specific tests on the DUT:

  • Start Control Character Creation and Alignment
  • Reception of Start Control Character
  • Reception of Preamble and SFD
  • Reception of Terminate Control Character
  • Assertion of DATA_VALID_STATUS
  • Reception of /E/ during DATA_VALID_STATUS
  • Continuous Reception of Fault Sequences
  • Reception of Identical Fault Sequences
  • Reception of Non-Identical Fault Sequences
  • Setting of col_cnt
The Value Proposition Xilinx is the industry’s only FPGA vendor that has its complete Ethernet IP product family neutrally tested to IEEE 802.3 standards conformance and interoperability.

These tests on the Ethernet IP product family of 10/100, 1 Gbps, and 10 Gbps speeds ensure the following value proposition:

  • Proven interoperability with industrystandard equipment
  • Reduced hardware testing burden for customers
  • First-time design success and seamless operation (such as plug-and-play)
This invaluable approval builds customer confidence with low risk and accelerated time to market, while conformance testing also shows the company’s commitment to quality.

Conclusion
Understanding interoperability is the key to market acceptance and opportunity. Interoperability means plug-and-play operation that works within your environment and application, independent of who provided the product.

The UNH IOL Consortium acts as an extension of research and development labs, helping members test their products for conformance to industry standards and interoperability between devices from different manufacturers.

Xilinx is the only FPGA vendor to successfully bring the complete Ethernet solution to the market with the certification of the UNH IOL. With proven interoperability, you can confidently built a system for first-time design success, meet your design goals, and accelerate time to market instead of worrying about the underlying infrastructure.

For more information, visit www.xilinx.com/systemio/interop.index.htm.

Printable PDF version of this article with graphics. PDF logo (8/1/04) 277 KB

 
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