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Home : Documentation : Xcell Journal Online : Article
Virtex-4 FPGA Source-Synchronous Interfaces Tool Kit



Interfaces Tool Kit
Features
  • Design with major differential I/O standards in networking, computing, storage, and wireless
  • Pre-engineered IP and reference designs
  • A unique built-in silicon feature enables 1 Gbps performance
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Article PDF 180 KB


Achieve faster, easier implementation with source-synchronous interfaces.
Today’s telecom and networking systems use high-bandwidth interfaces based on LVDS, HyperTransport™, and other differential I/O standards. These standards simplify system design by lowering pin count and power consumption and improving signal integrity.

Protocols based on these standards, such as SPI-4.2, RapidIO™, and HyperTransport, are central to leading-edge system design.

Xilinx® Virtex-4™ FPGAs offer up to 1 Gbps SelectIO™ parallel I/O, with the flexibility to use any I/O pair as differential I/O. Additional benefits for higher level protocol implementation include:

  • ChipSync™ source-synchronous I/O technology for dynamic precision phase alignment and data centering with per-bit de-skew
  • Bitslip module supports training patterns
  • Internal SerDes modules and regional clocks enable 1 Gbps DDR bandwidth The Virtex-4 FPGA source-synchronous interfaces tool kit comes with the following Xilinx Productivity Advantage (XPA) options:
  • ML450 platform, including Compact Flash, clock modules, documentation, reference designs, cables, and evaluation software
  • ISE™ Foundation™ software
  • IP cores: SPI-4.2, RapidIO, and GFP
  • Training, Premium, and Titanium Services
  • Check with your Xilinx sales representative for availability

Buy the source-synchronous interfaces tool kit today to get started on your design. For more information about the kit, the Virtex-4 FPGA family, ChipSync technology, and available optional IP, visit www.xilinx.com/virtex4/.

Printable PDF version of this article with graphics. PDF logo (1/15/05)180 KB

 
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