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Home : Documentation : Xcell Journal Online : Article
Developing Next-Generation Telecommunication Networks



by Amit Dhir, Senior Manager, Strategic Solutions, Wired Networks and Telecom Markets, Xilinx, Inc.
amit.dhir@xilinx.com (1/15/05)


Virtex-4 FPGAs provide the density, features, and performance at low price points to enable the communication revolution.
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Although the dot-com bubble may have burst, the Internet has continued its multifold growth, thus placing a strain on telecommunication networks. Both individuals and businesses are demanding more bandwidth to run new communications options, such as desktop video conferencing, IP telephony, remote storage, and mobile communications.

This is the driving force behind the need to transform the multiple, costly, and complex networks in use today into a smarter, multipurpose, global, cost-effective broadband network. This transformation will generate new sources of revenue for service providers, provide greater opportunities and productiveness for enterprises, and meet the needs of consumers who value multimedia, the freedom of mobility, and personalized and secure private network services. The boundaries between public and private, wired and wireless, and voice and data networks are vanishing.

The key elements of a more intelligent, high-speed, multi-purpose global network include broadband and optical technologies, voice over packet, wireless data, multimedia services and applications, and security, all underpinned by a packet network core. Typical telecom- and datacomwired equipment can be segmented into line cards, switch cards, control cards, and a backplane. Network convergence requires equipment vendors to support multiple technologies, including SONET/SDH, PDH, Data over SONET (GFP, VCAT, and LCAS), Fibre Channel, Ethernet, DVI, DSL, PON, and MPLS, depending on the system’s location in the access networks, metropolitan area networks, enterprises, and wireless networks.

Because data is transmitted in IP packets, packet processing has become a sophisticated architectural decision depending on the end system. This also influences the switch architecture and backplane topology. Also, with time to market and cost pressures, equipment providers continue to focus on technology and innovation as the cornerstones for creating new revenue opportunities.

< Enabling the Communications Revolution
Xilinx® FPGAs offer a high-performance fabric, integrated features, and powerful clock management, thus providing an ideal platform for communications equipment vendors to develop their solutions. Xilinx also provides case studies, IP, and reference designs to help customers with their designs in several key applications.

Telecom and Datacom Line Card Port Interfaces
Digital telecom infrastructure has mostly been based on PDH and SONET/SDH technologies in the metropolitan area and transport networks. The transport of data traffic (Ethernet, Fibre Channel, ESCON, and DVI) onto SONET/SDH networks is giving rise to technologies such as generic framing procedure and virtual concatenation. This flux is requiring a need for programmable solutions that can allow vendors to have a single SFP or XFP module to support multiple technologies at given rates. With the Virtex-4™ FX family supporting Gigabit Ethernet (1 and 10 Gbps), Fibre Channel (1, 2, 4, 8 and 10 Gbps), and SONET (OC-12 and OC-48) on every RocketIO™ serial transceiver, you have extreme flexibility in the I/Os.

The FPGA, coupled with robust IP offerings from Xilinx and our partners for MACs and framers/mappers, presents a flexible solution that can be morphed depending on the service provider’s needs on a per-port basis. This also helps in the lifecycle cost management of the system, as fewer cards need to be maintained and can be programmed with the relevant port interfaces required upon shipping (Figure 1).

Serial Backplanes and Switching
With exploding data rates and source synchronous I/Os unable to keep up with the pace at which packet communication occurs between the line cards, vendors are universally looking at serial technologies to solve the bandwidth problem. RocketIO transceivers, which support a wide performance range of 622 Mbps to 11.1 Gbps, can also be used to drive several tens of inches on FR-4 and other exotic materials – at different rates. With Virtex-II Pro™ and Virtex-II Pro-X families and the integrated RocketIO transcievers, Xilinx has already enabled several customers to upgrade their backplane to faster rates.

With the Virtex-4 family’s third-generation multi-gigabit transceivers and enhanced features such as AC coupling, programmable preemphasis, and receive (linear and decision feedback) equalization, you can ensure signal integrity in a wide variety of applications and give new life to old systems by upgrading legacy backplanes.

Industry standards such as Serial RapidIO™, Gigabit Ethernet, and PCI Express (including out-of-band signaling and spread spectrum clocking) are all supported. Virtex-4 FX FPGAs enable bridging between just about any serial or parallel system interface.

To enable the creation of mesh designs, Xilinx offers the mesh fabric reference design for complete flexible connectivity across a serial backplane based on the standard of your choice. Xilinx also provides signal integrity tools and resources such as the ATCA development board to ease the process of designing SerDes solutions into your next-generation backplane.

Packet Processing
Although several network processor vendors have attempted to solve packet processing (classification, policing, queuing, and scheduling) glitches, achieving performance and power goals continues to be challenging. Virtex-4 FPGAs solve network processing challenges with features such as system and memory interfaces, clock managers, block RAM, DSP slices, PowerPC™, and high-speed programmable logic. Xilinx also offers solutions such as the queue manager and mesh fabric reference designs to help with traffic management needs.

Simplifying System Design Challenges
The fundamentals of unparalleled flexibility and high performance are further extended in the Virtex-4 family. To help simplify your system design challenges, Xilinx also offers:

  • Integration. The integration of processors, tri-mode Ethernet MACs, DSP slices, SerDes, memory, and other features in the FPGA helps reduce your bill of materials and saves FPGA resources. This reduction in component count helps streamline logistics with a smaller bill of materials and simplifies the design and manufacture of system hardware because of simpler PCB design and manufacturing and improved reliability through the reduction of solder joints.
  • SelectIO™ technology and connectivity IP. Virtex-4 FPGAs make it easy to build robust high-speed memory and networking interfaces. All Virtex-4 platforms include configurable, high-performance SelectIO technology to support a wide variety of I/O standards. Virtex-4 FPGAs provide as many as 960 user I/Os, supporting more than 20 single-ended and differential electrical I/O standards to enable several parallel system interface standards on one device. New ChipSync™ technology built into every I/O block makes source-synchronous interfacing to the latest high-speed components easy. Plus, powered with XCITE technology, each I/O block delivers on-chip active I/O termination, eliminating external termination resistors to increase signal integrity, save board space, and reduce system cost. Xilinx also provides a robust offering of IP (PCI, SPI-3, SPI-4.2, RapidIO) and reference designs (DDR2, DDR, QDR II, RLDRAM II, FCRAM II) for system and memory connectivity.
  • Embedded processing. With the embedded PowerPC and the soft MicroBlaze™ and PicoBlaze™ processors, Xilinx offers a range of processing solutions to match the requirements of different tasks, ranging from simple control functions to advanced algorithms and high-speed calculations. Also, in telecom cards the processors assist with simple functions such as alarm handling and performance monitoring.
  • Low-cost designs. Xilinx manufactures Virtex-4 FPGAs using 90 nm advanced process technology on 300 mm wafers. This allows us to produce approximately five times as many die per wafer, compared to building an equivalent chip in 130 nm process on 200 mm wafers. This lowers the cost per die significantly.
Additionally, the EasyPath™ program further lowers system cost for customers who are ready to take their finished design to volume production. Xilinx creates customized test programs for EasyPath customers that exercise only the device resources used in the specific design. This approach shortens test time and increases yield to reduce FPGA unit prices as much as 80%.

Conclusion
To learn more about the key markets and end applications of Xilinx solutions, visit www.xilinx.com/esp/ or e-mail espteam@xilinx.com. For more details on Virtex-4 FPGAs, visit www.xilinx.com/virtex4/.

Printable PDF version of this article with graphics. PDF logo (1/15/05) 295 KB

 
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