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Traditionally, designs for a variety of applications
used dedicated digital signal processing
(DSP) chips or application-specific
standard products (ASSPs) to process digital
information using signal processing
algorithms. Filtering, video processing,
encoding and decoding, and audio processing
were just a few of the many applications
using DSPs.
Now, with performance and capacity
improvements to FPGAs, as well as the efficiency
of common arithmetic operations
found in most DSP applications, FPGAs
performing DSP functions are becoming
more common. In many cases both processors
and FPGAs are used in the same application,
in a co-processing architecture where
the FPGA does pre- or post-processing to
accelerate processing speed.
One application that illustrates this
trend is in Doppler measurement systems,
which measure the velocity of solid or liquid
flows in a variety of environments.
From oil flowing in pipes to blood flowing
in the human heart, a non-invasive
Doppler-based approach to measurement
can dramatically reduce risk, reduce cost,
and improve accuracy over previous methods.
Typically these systems use DSP techniques
and employ a combined FPGA and
fixed-function DSP device like those
offered by Texas Instruments.
Doppler Measurement Systems
Doppler measurement systems use the
Doppler effect to measure the velocity of a
moving object – either a solid, liquid, or gas.
Probably the most well-known application is
a radar gun, which highway patrols use to
detect speeding automobiles.
When measuring something other than
the speed of an automobile, such as blood
movement in the heart, you will
need to take a variety of measurements
to determine the details of a
more complicated flow. One
method is to use a beam-focusing
technique. In this technique, a
multitude of detectors (many small
radar guns) measure the return frequency
from a sending source. The
detectors are spread out in a
parabola (as shown in Figure 1) so
that the return signals from the
focus point arrive at each detector
at the same time. The signals can
be combined – with a small bit of
processing to adjust for the small
variations in apparent velocity – to
determine the velocity of the object
at the focus.
This approach is fine if you can
move the detectors to scan the
entire area of interest, but if you
don’t have that luxury, another
technique can produce the same
result. By inserting a programmable
delay, which changes the time
at which the various detectors’
inputs are combined, you can
change the focus point to just
about any location in the field of
interest. For example, a fixed additional
delay moves the focus point
out, and changing the delay to
shorten the paths on one side of
the detectors moves the focal point
to that side. Figure 2 shows how
the adjustable delay can be used to
create a parabola-like effect. The adjustable
delay function is very easy to implement in
a register-rich FPGA and is a likely function
to split off from a traditional DSP as a
co-processor function.
Another important part of the measurement
process is to determine the mass of the object. You can do this by measuring
the amount of energy returned from the
focal point to the detectors. The more energy
returned, the more massive the object
(in general). This works particularly well
when what you are measuring has a fixed
consistency (like oil or other liquids flowing
in a pipe), but can be more difficult if
there are a variety of different masses or
reflectivities in the system.
Clearly, some knowledge about the system
to be measured can provide clues to help in
the measuring process. You can add an energy
measurement function to the FPGA coprocessor
by storing a digital value corresponding
to the amplitude of the returned signal.
This value is also delayed by the FPGA.
Example System Implementation
A block diagram of an example system
implementation is shown in Figure 3. The
FPGA in the middle of the diagram generates
the outbound signal used by the emitters.
This implementation uses the Xilinx®
Direct Digital Synthesizer IP core to easily
generate a variety of waveforms. The frequency
can be easily changed based on the
object being measured.
The detectors measure the analog
value of the returned signal and create
a digital value that is fed to the
FPGA. The FPGA does some firstlevel
filtering operations on the
incoming signal to adjust for the
position of the detectors. The FPGA
then inserts a programmable delay
for each detector stream to implement
the beam-focus function. The
data stream is combined, and a digital
filter determines the signal’s frequency
component. This provides
the Doppler reading necessary to
determine the velocity of the focal
point.
A MicroBlaze™ soft-core processor
inside the FPGA controls the
measurement process to allow higher
level functions like scanning, initialization,
testing, and diagnostics.
The DSP reads and stores the
results of the operation conducted
by the FPGA. Once a series of scans
is implemented, the processor can
construct a digital image of the
scanned area. You can assign different
colors to various velocities (linear,
log, or any other scale) and
convert the digital image to a video
image for real-time display on a
graphics terminal or for recording
for later playback. You can also easily
implement conversions to JPEG
or other video formats in the processor
by using one of the many available
software or tool packages.
You may want to experiment with
other system partitions. If real-time video
processing and storage takes too much
bandwidth from the processor, a portion
of the algorithm (perhaps the pre-processing
of the scan data) could be performed in the FPGA. Alternately, the JPEG processing
could be handled by the FPGA as
a stand-alone function, allowing the
processor to do more of the data preprocessing.
Many options are available,
yet an easy-to-use platform that can
quickly implement different partitions is
essential.
A co-processing-oriented application
like this one can benefit from the use of a
hardware development platform. Using a
hardware platform allows you to easily
experiment with a variety of system and
algorithm partitions – putting some functions
in the FPGA and others in the DSP.
DSP applications are often very difficult
to simulate in software, so the ability to
quickly create a hardware/firmware/software
platform can cut development time
significantly. Using the co-simulation
tools available in the Xilinx tool suite
through The MathWorks Simulink and
the target hardware is one technique that
can dramatically reduce design time.
Avnet DSP Co-Processing Design Kit
The Avnet DSP Co-Processing Design Kit
targets a wide range of DSP-oriented
applications that require both FPGAs and
DSPs. The kit features two main circuit
boards. The Virtex™-4 evaluation board
(shown in Figure 4) features a Xilinx
Virtex-4 SX-FF668 FPGA, Platform Flash
configuration PROM, expansion connectors,
Cypress CY7C68013 USB 2.0 controller,
National Semiconductor DP83847
10/100 Ethernet port, 128 x 64 OSRAM
graphical display, 8 MB Flash, 32 MB
DDR SDRAM, and a variety of user
switches and LEDs. The second board is
the TI DSP adaptor module (shown in
Figure 5) that interfaces between the
Virtex-4 board and a variety of TI DSP
evaluation boards. You can purchase the
TI board from Avnet to round out the
development platform.
The kit also includes example designs
and user documentation to make it easy to
get started on a new DSP design. Several
Xilinx application notes and reference
designs (some using Xilinx IP cores available
from the DSP System Generator tool)
are available online to give you even more
of a head start. The Xilinx DSP Central
website (www.xilinx.com/products/design_resources/dsp_central/grouping/index.htm)
has a complete list.
Conclusion
For a wide variety of DSP applications, it
makes sense to use both an FPGA and a fixed
function digital signal processor. In many of
these designs it may also make sense to prototype
your design using a hardware design
kit specifically targeted for co-processing
applications. Avnet Design Services offers a
variety of design kits that can be combined to
create just the right hardware platform for
your design. Start your design with a hardware-based development platform.
Visit www.em.avnet.com/dspstartingline/
for current information on all Xilinx
DSP-related tools from Avnet.
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