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With its combination of low cost and
full feature set, the Xilinx® Spartan™-3
family is uniquely positioned to enable
various digital consumer systems. One
market segment where Spartan-3 devices
are being widely accepted is the flat-panel
display (FPD) market.
Flat-panel displays are the fastest growing
segment of a new breed of consumer televisions.
There are three types of flat-panel
displays on the market: LCD, plasma, and
projection (DLP). All three types are poised
to dramatically increase unit shipments –
see Figure 1 from iSuppli Research.
The Spartan-3 Feature Set
Spartan-3 FPGAs offer various features that
are very useful for FPD system designers.
These include embedded multipliers that
enable very efficient DSP implementation;
shift-register functionality features that
enable high performance and reduce
resource utilization for implementation of
pipelined or multi-channel functions; large
memory resources; and built-in support for
popular differential I/O standards used in
the display market. Table 1 lists the various
Spartan-3 features and their use in DSP
implementation.
Table 1 – Spartan-3 features allow for an area-efficient design in FPD systems.
|
Spartan-3 Silicon Features | Value in FPD Applications |
| Embedded Multipliers | Efficientimplementation of MAC FIR and other DSP functions |
| Shift Register Logic | Efficient implementation of multi-channel functions |
| Block RAM and Distributed RAM | Video Line Buffers, Cache Tag Memory, Scratch-Pad Memory for
DSP co-efficients, Packet Buffers, FIFOs |
| Built-In Support for RSDS | RSDS support without terminating resistances, other special
design considerations |
A Spartan-3 device can be used in FPD
designs in various ways. Let’s look at some
typical FPGA usage within the FPD system.
Front-End Pre-Processing
The digital RGB signal will typically
require some kind of pre-processing before
it is fed into the main image processing
engine. This pre-processing can
be anything from discrete cosine transfer,
decryption, or interlacing/de-interlacing.
Normally this how an FPGA is generally
used – in conjunction with the customer’s
image-processing ASIC or ASSP.
One common use is to assist the ASSP in
image scaling and de-interlacing.
Core Processing
Although core image processing is generally
done using standard ASSPs or custom
ASICs, FPGAs are sometimes used
for custom processing. Xilinx, along
with its AllianceCORE™ and XPERTS
partners, provides a range of intellectual
property cores that can ease the design of
these functions. Visit the Xilinx IP
Center (www.xilinx.com/ipcenter/) for
more details.
Examples of such functions include
gamma correction, image scaling, edge
detection, sharpness, contrast, and frame
buffer. Given the range of features that
Spartan-3 devices provide, you can implement
many of these functions with minimal
silicon area. Some of the intellectual property
cores utilized by our customers include:
- Color Space Converter
- JPEG Codec
- Discrete Cosine Transfer
- MPEG Video Encoder/Decoder
Figure 2 shows the various functions in a
typical FPD that you can implement in a
Spartan FPGA.
Interfacing
Many times the FPGA is used for interfacing
to the screen or to the external memory.
Spartan-3 support for low-swing differential
I/O standards (such as reduced swing differential
signaling [RSDS]), as well as other single-ended standards such as SSTL/HSTL,
allows it to be used in such applications.
The FPGA can also be used to implement
the timing control unit (TCON) to control
the horizontal and vertical pixel displays format.
TCON is more or less a vertical and
horizontal display counter. The large amount
of flip-flops in the Spartan-3 architecture
and a built-in carry chain allows for an efficient
implementation of this function.
Also, with abundant differential I/O
channels, Spartan-3 FPGAs have an efficient
architecture for designs that are more I/Ointensive.
Figure 3 shows how even a small
Spartan-3E device has enough differential
I/O resources to drive a large LCD/plasma
screen.
In many designs customers require an
interface to high-speed DDR external memory.
Xilinx provides reference designs and
application notes that allow you to build an
efficient memory controller within the
Spartan-3 fabric.
Conclusion
With some of the industry’s lowest price
points and full-featured capabilities, a
Spartan-3/E FPGA is ideal for various low cost digital consumer systems. In flat-panel
display systems, the Spartan-3/E architecture
is even more useful because it allows highperformance
DSP to be implemented in a
fraction of the area consumed by competing
FPGAs. It also has built-in support for lowswing
display I/O standards such as RSDS.
Spartan-3 FPGAs have been used to
implement these functions successfully within
flat-panel display systems:
- SD/HD color space conversion
- 4:4:4 to 4:2:2 downsampling
- Digital RGB-to-USB card reader
function
- Timing control and panel RSDS
drivers
- Image compression/decompression
The programmable nature of an
FPGA solution reduces the inherent
development risk in a new system design.
With its host of other features such as
multiple I/O banks, on-chip digital
clock managers, and extensive block and
distributed memory, Spartan-3 devices
can also efficiently implement many
control/glue logic functions, effectively
reducing the size, complexity, and cost of
your system.
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