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Issue 55 Feature Articles


Viewpoint:
Improving Time to Design Closure with ISE Software
 
Timing closure is perhaps the single most important design issue facing designers today. This article explores the methodology to achieve timing closure for Xilinx designs.
Design Performance:
Physical Synthesis and Optimization
  
Meet your peroformance targets with these tips and strategies.
Verification:
Early Defect Discovery with Assertion-based Verification
 
The convergence of design, synthesis, and verification.
Productivity:
Using the ISE Foundation Architecture Wizard
 
Streamline the process of configuring and instantiating the complex blocks found in Xilinx devices
Partial Reconfiguration:
PlanAhead Software as a Platform for Partial Reconfiguration
 
PlanAhead software delivers a streamlined environment to reduce space, weight, power, and cost.

Current Issue 55 

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Book PDF, 7.9 MB

Table of Contents
Letter From the Editor: A Roadmap to Productivity
Viewpoint
Improving Time to Design Closure with ISE Software
Design Performance
Design Tools for Performance
Achieve Faster Timing Closure with Graph-based Physical Synthesis
Physical Synthesis and Optimization with ISE Software
Improve Design Performance Using PlanAhead Design Tools
Synthesis Tool Strategies
Accelerate Design Performance Using Xplorer
Achieve Your Performance Goals with PlanAhead Software
HDL Coding Practices to Accelerate Design Performance
Writing RTL Code for Virtex-4 DSP48 Blocks with XST 8.1i
Verification
Un-Tethered Debugging
Shorter Verification Cycles at Lucent Technologies
Verifying Your Logic Design for First-Time Success
Early Defect Discovery with Assertion-Based Verification Accelerates Design Closure
Productivity
Simplifying FPGA Pin Assignment Closure
Power Considerations in 90 nm FPGA Designs
Using the ISE Foundation Architecture Wizards
Partial Reconfiguration
Benefits of Partial Reconfiguration
PlanAhead Software as a Platform for Partial Reconfiguration
General
Supporting Players
Real-Time Analysis of DSP Designs
Configuration Choices – Platform Flash or Commodity Flash
Accelerating PowerPC Software Applications
Nucleus Integration with Xilinx FPGA System Design
Programming FPGAs for High-Performance Computing Acceleration
Flexibility with EasyPath FPGAs
Xilinx Embedded Ethernet MACs Negotiate the Data
Program SPI Serial Flash from Xilinx FPGAs and CPLDs
Add Valuable Software Modules with XPS
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