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AR# 10161

3.1i Foundation ISE - "FATAL ERROR: VHDL Analyzer issues an internal error. top_ram.vhd(72): Construct 'mark..."

Description

Keywords: Project, Navigator, 3.1i, Fatal, Error, View, VHDL,
instantiation, template, configuration, statement

Urgency: Standard

General Description:
My design contains an instantiated module and an associated configuration
statement. If I run "View VHDL Instantiation Template" or "View VHDL Test
Bench Template," Project Navigator returns the following error message:

FATAL ERROR: VHDL Analyzer suffered an internal error.
Description of the error is: top_ram.vhd(72): Construct 'mark
: sel_name' is not currently supported. Please contact
technical support... top_ram.vhd(70): WARNING: Configurations
are currently ignored. ERROR: This design does not contain
an entity named top_ram... vhdtdtfi completed with errors...

Solution

A workaround is to comment out the configuration statement when
running "View VHDL Instantiation Template" or "View VHDL Test
Bench Template."

This is necessary because the parser does not understand the
"Synopsys Translate Off" and "Synopsys Translate On" directives.
AR# 10161
Date Created 09/17/2000
Last Updated 01/15/2003
Status Archive
Type General Article