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AR# 10285

3.1i COREGen - Release Note 31i_ip_update1c.zip


Keywords: d_ip1, d_ip1c, 31i_ip_update1c, coregen, da, fir, filter, sine, cosine, lut,
lookup, table, virtex, adder, subtracter, subtractor, fd, based,
shift, register, accumulator, virtex-ii, block, ram, memory, problem,
single port, dual port, block memory, Asynchronous FIFO, Release Notes,
distributor memory, fft, known issues.

Urgency: Standard

General Description:
What is the difference between the D_IP1 and 31i_ip_update1c updates?


The new IP update, 31i_ip_update1c, replaces D_IP1, which was
released on July, 2000. The New IP update contains the same IP
cores and CORE Generator software updates that were available in D_IP1.

31i_ip_update1c differs from the original D_IP1 release in that the following
two bugs have been fixed:

1. Incomplete "analyze order files" have been corrected.
See (Xilinx Solution 10118) for more information.

2. The read-only file permissions in the archive files and directories have
been corrected. This will reduce the number of install problems that
generate "Error locating library " messages.
See (Xilinx Solution 7817) for more information.

NOTE: If you have already installed the D_IP1 update on your Xilinx install,
31i_ip_update1c can be installed over it. If you are a workstation user, your system
administrator may need to change the permission on your current CORE Generator
install before you install 31i_ip_update1c.

chmod -R u+w $XILINX/coregen

*** NO NEW CORES are in this update. ***

All Known Issues documented for D_IP1 still apply to 31i_ip_update1c.
See (Xilinx Solution 9332) for more information.
AR# 10285
Date Created 10/04/2000
Last Updated 08/23/2002
Status Archive
Type General Article