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AR# 10302

3.1i SP4 NGD2VHDL- Virtex-E time_sim.vhd file contains generic FACTORY_JF for X_CLKDLL2 model. (VHDL)

Description

Keywords: FACTORY_JF, X_CLKDLL2, Virtex, Virtex-E, Simprim, NGD2VHDL

Urgency: Standard

General Description:
If I run NGDANNO and NGD2VHDL on a Virtex-E design containing ClkDlls, I
will see a new generic for the X_CLKDLL2 module in the VHDL file. The new
generic is called FACTORY_JF. (This problem has been seen in Service Pack 4.)

The user will see:

U2 : X_CLKDLL2
generic map (
CLKDV_DIVIDE => 2.0,
DUTY_CYCLE_CORRECTION => TRUE,
FACTORY_JF => X"C080",
MAXPERCLKIN => 40000 ps
)

FACTORY_JF is not defined in the Simprims model for this component. Because
of this, the file cannot be compiled correctly by a timing simulator such as ModelSim,
which will use the Simprims files.

Solution

This problem is fixed in the latest 3.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates. The first
service pack containing the fix is 3.1i Service Pack 5.
AR# 10302
Date Created 08/29/2007
Last Updated 11/13/2002
Status Archive
Type ??????