UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 10561

3.1i SP4 Virtex-E PAR - Placer rejects placement of slices containing F5/F6 MUX.

Description

Keywords: ERROR:Place:1802, F5/F6MUX, RPM F5MUX, F6MUX, shift, SRL16

Urgency: Standard

General Description:
F5/F6 MUX usage is similar to carry chains in that the place can only handle them
if all elements are contained in a macro or all elements are not contained in
a macro.

Problems arise when one of the muxes gets combined into a macro that is being
constructed for reasons other than to align the muxes. In this case, one of the muxes
was packed with a shift register; then, the placer built a macro to deal with the shift
register functionality, leading to the error:

ERROR:Place:1802 - Components abc] and xyz are using
the F5/F6MUX resources. The components should be in a
single common RPM. One component is not in the RPM.
Please either remove the constraints or correct them.

Solution

A workaround is to RLOC the three F5/F6 MUX pairs, or use some other form of map
constraint to prevent the mux and shift register combination.

This problem is fixed in the latest 3.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates. The first
service pack containing the fix is 3.1i Service Pack 6.
AR# 10561
Date Created 08/29/2007
Last Updated 10/21/2008
Status Archive
Type General Article