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AR# 10574

3.1i XST - The VHDL LOC attribute is ignored.


Keywords: XST, VHDL, LOC, attributes, constraints

Urgency: Standard

General Description:
The LOC attribute is not passed on to the NCF file when it is placed inside the architecture
section of the VHDL code.


To correct this problem, place the LOC constraint instantiations and assignments inside the
entity section of the design.

For example:

library ieee;
use ieee.std_logic_1164.all;

entity test_ff is
port (d : in std_logic;
clk : in std_logic;
q : out std_logic);
attribute LOC : string;
attribute LOC of d : signal is "D8"; --where D8 is the pin name
end entity;

architecture arch_ff of test_ff is


process (clk) begin
if clk'event and clk = '1' then
end if;

end process;
end architecture;
AR# 10574
Date Created 12/01/2000
Last Updated 08/19/2002
Status Archive
Type General Article