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AR# 10578

3.1i CLKDLLHF - CLKDLLHF does not activate LOCK without a reset pulse in simulation. (Verilog)

Description

Keywords: Unisim, CLKDLLHF, activate, reset, locked, simulation

Urgency: Standard

General Description:
In some cases, the locked signal on the CLKDLLHF does not
go high unless a reset pulse is supplied to the model. If the Reset
is just connected to ground, the CLKDLL model does not always
lock. In the device, Reset can be connected to ground and the
model will work.

Solution

This problem is fixed in the latest 3.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates. The first
service pack containing the fix is 3.1i Service Pack 6.
AR# 10578
Date Created 08/29/2007
Last Updated 08/28/2002
Status Archive
Type ??????