UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 10582

3.1i Virtex-E Speed Files - A speed modeling problem that affected the clock skew has been fixed.

Description

Keywords: Virtex-E, speed, timing, clock, skew

Urgency: Standard

General Description:
A speed modeling problem which was affecting the clock skew has been fixed.

Solution

This problem is fixed in the latest 3.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates. The first
service pack containing the fix is 3.1i Service Pack 6.
AR# 10582
Date Created 12/04/2000
Last Updated 12/07/2004
Status Archive
Type General Article