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AR# 10876

3..1i Virtex MAP - Design with invalid pad LOC crashes during directed packing.


Keywords: directed packing, LOC, GCLKIOB, crash

Urgency: Standard

General Description:
A case has been seen where MAP crashes during directed packing
on this design in 3.1i. It runs successfully if the LOC on non-clock
net "a" to "P89" (GCLKIOB) is removed.

In the development version of the next major release, the original
design will correctly fail with the message:

ERROR:Pack:683 - Unable to pack the following symbols concurrently into an empty
I/O component:
PAD symbol "a.PAD" (Pad Signal = a)
BUF symbol "a_ibuf" (Output Signal = a_c)
The symbol a.PAD has a constraint (LOC=P89) that specifies an illegal
physical site for the component. Please correct the constraint value.
Problem encountered during the packing phase.


Check for non-clock nets that are incorrectly LOC'd to GCLKIOBs.
If unable to debug the problem, please contact the Xilinx hotline
for help.

This design problem will be correctly reported in the next major release,
due out in July, 2001.

Please also see (Xilinx Answer 9558), (Xilinx Answer 9591), (Xilinx Answer 9536), and
(Xilinx Answer 10675).
AR# 10876
Date Created 08/29/2007
Last Updated 10/21/2008
Status Archive
Type General Article