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AR# 10950

ChipScope - How do I use ChipScope Core Inserter with Foundation ISE 3.x/4.x?


Keywords: ChipScope, ILA, ICON, ISE, Core Inserter, NGO, flow

Urgency: Standard

General Description:
ChipScope 2000-12 introduced a new mechanism for generating and inserting ICON and
ILA cores called the "Core Inserter." This tool reads in the post-synthesis top-level EDIF,
allows users to set ICON and ILA core parameters and define signal connections, generates
these cores, and creates a new top-level NGO file for implementation.

How can the Core Inserter be used with Foundation ISE version 3.x or 4.x?


These steps must be carefully followed to process a design through Foundation ISE while inserting ChipScope cores via the Core Inserter:

1. Initially translate the design. After a project has been created and HDL source files have been added, synthesize and translate the design. This can be done by simply double-clicking on "Translate" under "Implement Design."

2. Delete the newly created NGD file. Open Windows Explorer, navigate to the Project Directory, and delete <design>.ngd. (If the project is closed and reopened, you will see that the green check mark next to "Translate" has been removed.)

3. Run the ChipScope Core Inserter. Launch the Core Inserter from Start -> Programs -> ChipScope -> ChipScope Core Inserter. Set the following parameters under the Device tab:

Input Design Netlist = <ProjectDir>\<design>.edn
Output Design Netlist = <ProjectDir>\_ngo\<design>.ngo
Output Directory = <ProjectDir>\_ngo

(NOTE: Browse for the input <design>.edf or <design>.edn file. All other fields will be filled in. Modify the directories as shown above; the __ngo directory has one leading underscore ("_").)

4. Define core parameters and connect all signals, then generate the cores. Core generation will place new .ngo files for the top level, as well as for the ICON and ILA cores, in the _ngo directory.

5. In Foundation ISE, right-click on "Translate" and select "Properties". In the User Constraints File field, browse to find the modified UCF file that was specified in the Output Constraints File above. This UCF file is the original constraints file with the ILA-specific constraints added.

Within the Translate Properties dialog box, verify that the Netlist Translation Type is set to "Timestamp". If this option does not appear in this dialog box, select Edit -> Preferences, choose the Processes tab, and set the Property Display Level to "Advanced".

6. Rerun the "Translate" step. Double-click on "Translate", or right-click on "Translate" and select "Run." DO NOT select "Rerun All", as this will rerun Synthesis and the first portion of Translate, which will undo the core insertion that was just performed. The RUN command will start with the new .ngo files and will pick up the new .ucf file.

7. Continue with implementation. Be sure to specify the ChipScope options (JTAG clock, enable Readback) when creating your bit stream.

These steps must be followed after any modifications to the HDL source have been made. Simply running through the standard ISE flow will remove the ChipScope cores from the design.
AR# 10950
Date Created 08/29/2007
Last Updated 09/30/2005
Status Archive